The DisplayPort code already has the concept of preferred link settings, but it only allows setting a preferred lane count and link width at the same time. It does not consider the possiblity that some devices may not work on lower link rates but may support various lane counts.
Allow specifying a preferred link rate which will be used as the initial link rate when deciding the DP link settings. This is necessary to support NUTMEG which only works with HBR but not with RBR. For reference, see the legacy non-DC amdgpu display code: amdgpu_atombios_dp_get_dp_link_config() Signed-off-by: Timur Kristóf <[email protected]> --- .../gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c index cdc7587cf0b6..e12bf3dd3e46 100644 --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c @@ -743,6 +743,8 @@ static bool decide_dp_link_settings(struct dc_link *link, struct dc_link_setting { struct dc_link_settings initial_link_setting = { LANE_COUNT_ONE, LINK_RATE_LOW, LINK_SPREAD_DISABLED, false, 0}; + if (link->preferred_link_setting.link_rate != LINK_RATE_UNKNOWN) + initial_link_setting.link_rate = link->preferred_link_setting.link_rate; struct dc_link_settings current_link_setting = initial_link_setting; uint32_t link_bw; -- 2.52.0
