[Public]
>-----Original Message-----
>From: Joshi, Mukul <[email protected]>
>Sent: Wednesday, January 28, 2026 12:26 AM
>To: Yu, Lang <[email protected]>; [email protected]
>Cc: Zhang, Hawking <[email protected]>; Deucher, Alexander
><[email protected]>; Belanger, David <[email protected]>
>Subject: RE: [PATCH 1/4] drm/amdgpu: Add a helper macro to align mqd size
>
>[AMD Official Use Only - AMD Internal Distribution Only]
>
>> -----Original Message-----
>> From: Yu, Lang <[email protected]>
>> Sent: Monday, January 26, 2026 5:25 AM
>> To: [email protected]
>> Cc: Zhang, Hawking <[email protected]>; Deucher, Alexander
>> <[email protected]>; Joshi, Mukul <[email protected]>;
>> Belanger, David <[email protected]>; Yu, Lang <[email protected]>
>> Subject: [PATCH 1/4] drm/amdgpu: Add a helper macro to align mqd size
>>
>> MES FW uses addr(mqd_addr + sizeof(struct mqd) + 3*sizeof(uint32_t))
>> as fence address and writes a 32 bit fence value to this address.
>>
>> Driver needs to allocate some extra memory(at least 4 DWs) in addition
>> to sizeof(struct mqd) as mqd memory.
>>
>> For gfx11/12, sizeof(struct mqd) < PAGE_SIZE, allocate mqd memory with
>> PAGE_SIZE aligned works. For gfx12.1, sizeof(struct mqd) == PAGE_SIZE,
>> it doesn't work.
>>
>> KFD mqd manager hardcodes mqd size to PAGE_SIZE/MQD_SIZE.
>>
>> Let's use AMDGPU_MQD_SIZE_ALIGN to avoid hardcoding in differnet place
>> and across different IP version. It is used in two place.
>> 1. mqd memory alloction
>> 2. mqd stride initialization
>>
>> Signed-off-by: Lang Yu <[email protected]>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> index 9c11535c44c6..41f32ed39113 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>> @@ -1239,6 +1239,11 @@ struct amdgpu_device {
>> struct amdgpu_kfd_dev kfd;
>> };
>>
>> +/*
>> + * MES will use memory beyond struct MQD size, 5 DWs currently */
>> +#define AMDGPU_MQD_SIZE_ALIGN(mqd_size) ALIGN(((mqd_size) + 20),
>> +PAGE_SIZE)
>
>Should we be using GPU Page size instead of CPU page size here?
>Maybe this should be AMDGPU_GPU_PAGE_SIZE instead of PAGE_SIZE or you can
>use AMDGPU_GPU_PAGE_ALIGN macro instead of ALIGN here.
Make sense. Thanks.
Regards,
Lang
>Regards,
>Mukul
>> +
>> static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev,
>> uint8_t ip, uint8_t inst) {
>> --
>> 2.34.1
>
