retire legacy RAS reset/query operations for XGMI v6_4

Signed-off-by: Ce Sun <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 49 +-----------------------
 1 file changed, 2 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index 5fa706915d49..59c76fe3c56b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -106,16 +106,6 @@ static const int 
walf_pcs_err_noncorrectable_mask_reg_aldebaran[] = {
        smnPCS_GOPX1_PCS_ERROR_NONCORRECTABLE_MASK + 0x100000
 };
 
-static const int xgmi3x16_pcs_err_status_reg_v6_4[] = {
-       smnPCS_XGMI3X16_PCS_ERROR_STATUS,
-       smnPCS_XGMI3X16_PCS_ERROR_STATUS + 0x100000
-};
-
-static const int xgmi3x16_pcs_err_noncorrectable_mask_reg_v6_4[] = {
-       smnPCS_XGMI3X16_PCS_ERROR_NONCORRECTABLE_MASK,
-       smnPCS_XGMI3X16_PCS_ERROR_NONCORRECTABLE_MASK + 0x100000
-};
-
 static const struct amdgpu_pcs_ras_field xgmi_pcs_ras_fields[] = {
        {"XGMI PCS DataLossErr",
         SOC15_REG_FIELD(XGMI0_PCS_GOPX16_PCS_ERROR_STATUS, DataLossErr)},
@@ -1165,17 +1155,6 @@ static void amdgpu_xgmi_reset_ras_error_count(struct 
amdgpu_device *adev)
        default:
                break;
        }
-
-       switch (amdgpu_ip_version(adev, XGMI_HWIP, 0)) {
-       case IP_VERSION(6, 4, 0):
-       case IP_VERSION(6, 4, 1):
-               for (i = 0; i < ARRAY_SIZE(xgmi3x16_pcs_err_status_reg_v6_4); 
i++)
-                       pcs_clear_status(adev,
-                                       xgmi3x16_pcs_err_status_reg_v6_4[i]);
-               break;
-       default:
-               break;
-       }
 }
 
 static int amdgpu_xgmi_query_pcs_error_status(struct amdgpu_device *adev,
@@ -1193,11 +1172,7 @@ static int amdgpu_xgmi_query_pcs_error_status(struct 
amdgpu_device *adev,
 
        if (is_xgmi_pcs) {
                if (amdgpu_ip_version(adev, XGMI_HWIP, 0) ==
-                   IP_VERSION(6, 1, 0) ||
-                   amdgpu_ip_version(adev, XGMI_HWIP, 0) ==
-                   IP_VERSION(6, 4, 0) ||
-                   amdgpu_ip_version(adev, XGMI_HWIP, 0) ==
-                   IP_VERSION(6, 4, 1)) {
+                   IP_VERSION(6, 1, 0)) {
                        pcs_ras_fields = &xgmi3x16_pcs_ras_fields[0];
                        field_array_size = ARRAY_SIZE(xgmi3x16_pcs_ras_fields);
                } else {
@@ -1235,7 +1210,7 @@ static void amdgpu_xgmi_query_ras_error_count(struct 
amdgpu_device *adev,
                                                     void *ras_error_status)
 {
        struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;
-       int i, supported = 1;
+       int i;
        uint32_t data, mask_data = 0;
        uint32_t ue_cnt = 0, ce_cnt = 0;
 
@@ -1299,26 +1274,6 @@ static void amdgpu_xgmi_query_ras_error_count(struct 
amdgpu_device *adev,
                }
                break;
        default:
-               supported = 0;
-               break;
-       }
-
-       switch (amdgpu_ip_version(adev, XGMI_HWIP, 0)) {
-       case IP_VERSION(6, 4, 0):
-       case IP_VERSION(6, 4, 1):
-               /* check xgmi3x16 pcs error */
-               for (i = 0; i < ARRAY_SIZE(xgmi3x16_pcs_err_status_reg_v6_4); 
i++) {
-                       data = RREG32_PCIE(xgmi3x16_pcs_err_status_reg_v6_4[i]);
-                       mask_data =
-                               
RREG32_PCIE(xgmi3x16_pcs_err_noncorrectable_mask_reg_v6_4[i]);
-                       if (data)
-                               amdgpu_xgmi_query_pcs_error_status(adev, data,
-                                               mask_data, &ue_cnt, &ce_cnt, 
true, true);
-               }
-               break;
-       default:
-               if (!supported)
-                       dev_warn(adev->dev, "XGMI RAS error query not 
supported");
                break;
        }
 
-- 
2.34.1

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