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Hi all,

This week this patchset was tested on 4 systems, two dGPU and two APU based, 
and tested across multiple display and connection types.

APU
        * Single Display eDP -> 1080p 60hz, 1920x1200 165hz, 3840x2400 60hz
        * Single Display DP (SST DSC) -> 4k144hz, 4k240hz
        * Multi display -> eDP + DP/HDMI/USB-C -> 1080p 60hz eDP + 4k 144hz, 4k 
240hz (Includes USB-C to DP/HDMI adapters)
        * Thunderbolt -> LG Ultrafine 5k
        * MST DSC -> Cable Matters 101075 (DP to 3x DP) with 3x 4k60hz 
displays, HP Hook G2 with 2x 4k60hz displays
        * USB 4 -> HP Hook G4, Lenovo Thunderbolt Dock, both with 2x 4k60hz DP 
and 1x 4k60hz HDMI displays
        * SST PCON -> Club3D CAC-1085 + 1x 4k 144hz, FRL3, at a max resolution 
supported by the dongle of 4k 120hz YUV420 12bpc.
        * MST PCON -> 1x 4k 144hz, FRL3, at a max resolution supported by the 
adapter of 4k 120hz RGB 8bpc.

DGPU
        * Single Display DP (SST DSC) -> 4k144hz, 4k240hz
        * Multiple Display DP -> 4k240hz + 4k144hz
        * MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60hz displays)
        * MST DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60hz 
displays)

The testing is a mix of automated and manual tests. Manual testing includes 
(but is not limited to)
        * Changing display configurations and settings
        * Video/Audio playback
        * Benchmark testing
        * Suspend/Resume testing
        * Feature testing (Freesync, HDCP, etc.)

Automated testing includes (but is not limited to)
        * Script testing (scripts to automate some of the manual checks)
        * IGT testing

The testing is mainly tested on the following displays, but occasionally there 
are tests with other displays
        * Samsung G8 Neo 4k240hz
        * Samsung QN55QN95B 4k 120hz
        * Acer XV322QKKV 4k144hz
        * HP U27 4k Wireless 4k60hz
        * LG 27UD58B 4k60hz
        * LG 32UN650WA 4k60hz
        * LG Ultrafine 5k 5k60hz
        * AU Optronics B140HAN01.1 1080p 60hz eDP
        * AU Optronics B160UAN01.J 1920x1200 165hz eDP
        * Samsung ATNA60YV02-0 3840x2400 60Hz OLED eDP


The patchset consists of the amd-staging-drm-next branch (Head commit - 
5234cbd0f4b39bbf04640566218b08ff47d51bc7 -> drm/amd/display: Promote DC to 
3.2.392) with new patches added on top of it.

Tested on Ubuntu 26.04, on Gnome Wayland.

Tested-by: Dan Wheeler <[email protected]>


Thank you,

Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com


-----Original Message-----
From: Tom Chung <[email protected]>
Sent: Wednesday, August 5, 2026 2:36 AM
To: [email protected]
Cc: Wentland, Harry <[email protected]>; Li, Sun peng (Leo) 
<[email protected]>; Pillai, Aurabindo <[email protected]>; Li, Roman 
<[email protected]>; Lin, Wayne <[email protected]>; Chung, ChiaHsuan (Tom) 
<[email protected]>; Zuo, Jerry <[email protected]>; Wheeler, Daniel 
<[email protected]>; Wu, Ray <[email protected]>; LIPSKI, IVAN 
<[email protected]>; Hung, Alex <[email protected]>; Lin, Ping Lei 
<[email protected]>; Chen, Chen-Yu <[email protected]>
Subject: [PATCH 00/34] DC Patches Aug 10 2026

This DC patchset brings improvements in multiple areas. In summary, we have:

- DCN6 fixes on GPUVM calculations, HostVM and SOCBB VM config,
  clkmgr interfaces, and peak bandwidth measurement
- Unified fast update classification paths and inbox0 HW lock on DCN35
- HDMI FRL fixes on LT timeout behaviour and cap restore during
  non-destructive link verify
- Greatly enhanced KUnit coverage across CRTC, VRR, and cursor paths
- eDP panel polarity control, FreeSync range quirk, and Z8-based
  zstate support
- DCE ASIC code gated behind CONFIG_DRM_AMD_DC_DCE for DCN-only builds
- Fixes on HPD filter programming, DMUB DIG PHY wait, dcn42b
  force_min_dcfclk clamp, audio tests, and UTM client QC profile override


Cc: Daniel Wheeler <[email protected]>

Alex Hung (7):
  drm/amd/display: test stream VRR updates
  drm/amd/display: test VRR IRQ parameters
  drm/amd/display: test VRR transitions
  drm/amd/display: test dm_check_cursor_fb
  drm/amd/display: test native cursor state check
  drm/amd/display: test dm_plane_color_pipeline_active
  drm/amd/display: test amdgpu_dm_crtc_get_cursor_mode

Alvin Lee (2):
  drm/amd/display: Update dcn60 clkmgr interfaces
  drm/amd/display: Apply workaround to limit SopCount for now

Bhawanpreet Lakha (6):
  drm/amd/display: Cover crtc duplicate_state stream and null guard
  drm/amd/display: Cover crtc destroy callback
  drm/amd/display: Add reset_state existing-state branch test
  drm/amd/display: Add amdgpu_dm_crtc_late_register test
  drm/amd/display: Add amdgpu_dm_crtc_init tests
  drm/amd/display: Add KUnit tests for
    amdgpu_dm_crtc_helper_atomic_check

Charlene Liu (2):
  drm/amd/display: fix HPD program filter programming
  drm/amd/display: add a NULL pointer check

Dillon Varone (1):
  drm/amd/display: Add support for overriding UTM client QC profile

Fangzhi Zuo (2):
  drm/amd/display: Force FreeSync range minimum on quirky panels
  drm/amd/display: restore FRL cap on non-destructive HDMI link verify

Gabe Teeger (1):
  drm/amd/display: clamp force_min_dcfclk to dcn42b range

Gaghik Khachatrian (1):
  drm/amd/display: gate DCE ASIC code behind CONFIG_DRM_AMD_DC_DCE

Harry VanZyllDeJong (1):
  drm/amd/display: eDP panel polarity control and test support

Nicholas Kazlauskas (2):
  drm/amd/display: Fix crash in DCN5/6 calcs when GPUVM enabled
  drm/amd/display: Fix HostVM init and SOCBB VM config for DCN6

Ovidiu Bunea (1):
  drm/amd/display: Decide zstate_support based off Z8 global support

Rafal Ostrowski (1):
  drm/amd/display: Unify fast update classification paths

Ray Wu (1):
  drm/amd/display: Align KUnit tests Makefile license header

Relja Vojvodic (1):
  drm/amd/display: Update and revert FRL LT Timeout behaviour

Sridevi Arvindekar (1):
  drm/amd/display: Fix audio test errors

Taimur Hassan (1):
  drm/amd/display: Promote DC to 3.2.393

Wayne Lin (1):
  drm/amd/display: Extend DMUB wait for DIG PHY programming commands

Wenjing Liu (1):
  drm/amd/display: Fix DCN6 peak bandwidth measurement overshoot

YiLing Chen (1):
  drm/amd/display: Extend inbox0 HW lock support to DCN35

 drivers/gpu/drm/amd/display/Kconfig           |   9 +
 .../display/amdgpu_dm/amdgpu_dm_connector.c   |  12 +
 .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c    |  10 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_crtc.h    |   6 +
 .../amd/display/amdgpu_dm/amdgpu_dm_cursor.c  |  16 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_cursor.h  |   6 +
 .../display/amdgpu_dm/amdgpu_dm_freesync.c    |   3 +
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c |  18 +
 .../drm/amd/display/amdgpu_dm/tests/Makefile  |   4 +-
 .../amdgpu_dm/tests/amdgpu_dm_crtc_test.c     | 645 ++++++++++++++++
 .../amdgpu_dm/tests/amdgpu_dm_cursor_test.c   | 694 ++++++++++++++++++
 .../amdgpu_dm/tests/amdgpu_dm_freesync_test.c | 407 ++++++++++  
.../amdgpu_dm/tests/amdgpu_dm_helpers_test.c  |  17 +
 .../display/dc/bios/command_table_helper.c    |   7 +-
 .../display/dc/bios/command_table_helper2.c   |   2 +
 .../gpu/drm/amd/display/dc/clk_mgr/Makefile   |   8 +
 .../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c  |   4 +
 .../display/dc/clk_mgr/dce100/dce_clk_mgr.c   | 115 ---
 .../display/dc/clk_mgr/dce100/dce_clk_mgr.h   |   8 +-
 .../dc/clk_mgr/dce112/dce112_clk_mgr.c        |  59 --
 .../dc/clk_mgr/dce112/dce112_clk_mgr.h        |   4 +-
 .../display/dc/clk_mgr/dcn10/dcn10_clk_mgr.c  | 181 +++++  
.../display/dc/clk_mgr/dcn10/dcn10_clk_mgr.h  |  29 +
 .../dc/clk_mgr/dcn42b/dcn42b_clk_mgr.c        |  30 +-
 .../drm/amd/display/dc/clk_mgr/dcn60/dalsmc.h | 344 ++-------  
.../display/dc/clk_mgr/dcn60/dcn60_clk_mgr.c  | 115 +--  
.../display/dc/clk_mgr/dcn60/dcn60_clk_mgr.h  |  17 +-  
.../dc/clk_mgr/dcn60/dcn60_clk_mgr_smu_msg.c  | 220 +++++-  
.../dc/clk_mgr/dcn60/dcn60_clk_mgr_smu_msg.h  | 167 ++++-
 .../dc/clk_mgr/dcn60/dcn60_smu_driver_if.h    |  76 ++
 drivers/gpu/drm/amd/display/dc/core/dc.c      | 246 +------
 .../drm/amd/display/dc/core/dc_link_exports.c |  22 +  
.../gpu/drm/amd/display/dc/core/dc_resource.c |  79 ++
 drivers/gpu/drm/amd/display/dc/dc.h           |  42 +-
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c  |  54 +-  
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h  |  27 +
 drivers/gpu/drm/amd/display/dc/dc_stream.h    |   3 +
 drivers/gpu/drm/amd/display/dc/dc_types.h     |   1 +
 .../display/dc/dio/dcn10/dcn10_link_encoder.c |  10 +-
 .../dc/dio/dcn42/dcn42_dio_link_encoder.c     |   4 +-
 .../dml2_0/dml21/dml21_translation_helper.c   |   2 +-
 .../dc/dml2_0/dml21/inc/dml_top_types.h       |   1 +
 .../dml21/src/dml2_core/dml2_core_dcn4.c      |   4 +
 .../src/dml2_core/dml2_core_dcn4_calcs.c      |  15 +
 .../src/dml2_core/dml2_core_dcn4_calcs.h      |   1 +
 .../dml2_core/dml2_core_dcn5_calcs_dchub.c    |   2 +-
 .../src/dml2_core/dml2_core_shared_types.h    |   2 +
 .../gpu/drm/amd/display/dc/gpio/hw_factory.c  |   4 +
 .../drm/amd/display/dc/gpio/hw_translate.c    |   4 +
 .../display/dc/hubbub/dcn10/dcn10_hubbub.h    |  11 +-
 .../display/dc/hubbub/dcn60/dcn60_hubbub.c    | 206 +++++-
 .../display/dc/hubbub/dcn60/dcn60_hubbub.h    |  19 +-
 drivers/gpu/drm/amd/display/dc/hwss/Makefile  |   6 +
 .../amd/display/dc/hwss/dce110/dce110_hwseq.c |   2 +
 .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c   |  46 ++
 .../amd/display/dc/hwss/dcn35/dcn35_hwseq.h   |   4 +
 .../amd/display/dc/hwss/dcn35/dcn35_init.c    |   2 +
 .../amd/display/dc/hwss/dcn351/dcn351_init.c  |   2 +
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.c |  15 +-
 .../amd/display/dc/hwss/dcn401/dcn401_hwseq.h |   2 +-
 .../amd/display/dc/hwss/dcn42/dcn42_hwseq.c   |  13 +-
 .../amd/display/dc/hwss/dcn42/dcn42_hwseq.h   |   2 +-
 .../amd/display/dc/hwss/dcn60/dcn60_hwseq.c   |  16 +-
 .../drm/amd/display/dc/hwss/hw_sequencer.h    |   2 +-
 .../gpu/drm/amd/display/dc/inc/hw/dchubbub.h  |   1 +
 .../gpu/drm/amd/display/dc/inc/link_service.h |   5 +-
 drivers/gpu/drm/amd/display/dc/irq/Makefile   |   2 +
 .../dc/irq/dce110/irq_service_dce110.c        |  21 -
 .../dc/irq/dce110/irq_service_dce110.h        |   9 -
 .../gpu/drm/amd/display/dc/irq/irq_service.c  |  28 +
 .../gpu/drm/amd/display/dc/irq/irq_service.h  |   9 +
 .../drm/amd/display/dc/link/link_detection.c  |   2 +-
 .../drm/amd/display/dc/link/link_factory.c    |   4 +
 .../link/protocols/link_edp_panel_control.c   |  30 +
 .../link/protocols/link_edp_panel_control.h   |   4 +
 .../display/dc/link/protocols/link_hdmi_frl.c |  32 +-
 .../gpu/drm/amd/display/dc/resource/Makefile  |   4 +
 .../dc/resource/dce112/dce112_resource.c      |  62 --
 .../dc/resource/dcn60/dcn60_resource.c        |  10 +-
 .../dc/resource/dcn60/dcn60_resource.h        |   9 +-
 .../dcn60/dcn60_soc_and_ip_translator.c       |   6 +-
 .../gpu/drm/amd/display/include/dal_asic_id.h |   5 +
 82 files changed, 3357 insertions(+), 990 deletions(-)  create mode 100644 
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/dcn10_clk_mgr.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/dcn10_clk_mgr.h
 create mode 100644 
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/dcn60_smu_driver_if.h

--
2.43.0

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