AMD General The uclk setting when uclk dpm is disabled looks redundant, other than that, Series is Reviewed-by: Kenneth Feng <[email protected]>
-----Original Message----- From: Wang, Kevin <[email protected]> Sent: Monday, August 31, 2026 12:35 PM To: [email protected] Cc: Deucher, Alexander <[email protected]>; Zhang, Hawking <[email protected]>; Feng, Kenneth <[email protected]> Subject: [PATCH 0/7] drm/amd/pm: stage OD reset until commit The pp_od_clk_voltage interface exposes a staged OverDrive workflow: users edit clock, voltage, and power settings, then write "c" to commit them to the SMU. However, PP_OD_RESTORE_DEFAULT_TABLE does not follow this workflow on every SMU version. Some backends restore their cached settings and wait for "c", while others upload the reset table or send frequency-limit commands directly from "r". As a result, the same userspace sequence has different hardware effects across ASICs. For example: - SMU 14.0.0 and SMU 13.0.5 stage reset limits until "c". - SMU 14.0.2 and SMU 13.0.6 apply reset values immediately. - Navi10 stages the boot OD table, while Vega20 reads the current SMU table instead of restoring the saved defaults. This series makes "r" restore default values only in driver-side staging state. "c" remains the sole operation that uploads an OD table or sends frequency-limit commands to PMFW. This gives pp_od_clk_voltage one consistent transaction model: edit/reset -> staged driver state -> commit It also permits userspace to reset a staged configuration, adjust one or more settings, and submit the final configuration with one commit, without temporarily applying an intermediate default configuration. Link: https://gitlab.freedesktop.org/drm/amd/-/work_items/5690 Kevin Wang (7): drm/amd/pm: stage od reset for smu 11.0.7 drm/amd/pm: stage od reset for smu 13.0.2 drm/amd/pm: stage od reset for smu 13.0.0/13.0.7 drm/amd/pm: stage od reset for smu 13.0.6 drm/amd/pm: stage od reset for smu 14.0.2 drm/amd/pm: stage od reset for smu 15.0.8 drm/amd/pm: stage od reset for smu vega20 .../drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c | 75 ++++++++++++++-- .../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 2 +- .../drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 15 +--- .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 2 +- .../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 85 ++++++++++--------- .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 2 +- .../drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c | 2 +- .../drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c | 50 ++++++----- 8 files changed, 145 insertions(+), 88 deletions(-) -- 2.55.0
