That's a good point for simplifying the code and will send another patch for this.
Thanks, Prike From: Wang, Kevin(Yang) <[email protected]> Sent: Monday, September 23, 2019 5:22 PM To: Liang, Prike <[email protected]>; [email protected] Cc: [email protected]; Huang, Ray <[email protected]>; Quan, Evan <[email protected]>; Feng, Kenneth <[email protected]> Subject: Re: [PATCH 1/5] drm/amd/powerplay: bypass dpm_context null pointer check guard for some smu series the smu driver many place will use AMD_IS_APU flags, i think we'd better add a new member "is_apu" in smu_context" Best Regards, kevin ________________________________ From: amd-gfx <[email protected]<mailto:[email protected]>> on behalf of Liang, Prike <[email protected]<mailto:[email protected]>> Sent: Monday, September 23, 2019 4:43 PM To: [email protected]<mailto:[email protected]> <[email protected]<mailto:[email protected]>> Cc: [email protected]<mailto:[email protected]> <[email protected]<mailto:[email protected]>>; Huang, Ray <[email protected]<mailto:[email protected]>>; Liang, Prike <[email protected]<mailto:[email protected]>>; Quan, Evan <[email protected]<mailto:[email protected]>>; Feng, Kenneth <[email protected]<mailto:[email protected]>> Subject: [PATCH 1/5] drm/amd/powerplay: bypass dpm_context null pointer check guard for some smu series For now APU has no smu_dpm_context structure for containing default/current related dpm table, thus will not initialize smu_dpm_context and aviod null pointer check guard for APU. Signed-off-by: Prike Liang <[email protected]<mailto:[email protected]>> --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c index 90fa444..3afd2cd 100644 --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c @@ -1554,7 +1554,9 @@ static int smu_enable_umd_pstate(void *handle, struct smu_context *smu = (struct smu_context*)(handle); struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); - if (!smu->pm_enabled || !smu_dpm_ctx->dpm_context) + struct amdgpu_device *adev = smu->adev; + + if (!(adev->flags & AMD_IS_APU) && (!smu->pm_enabled || !smu_dpm_ctx->dpm_context)) return -EINVAL; if (!(smu_dpm_ctx->dpm_level & profile_mode_mask)) { @@ -1751,8 +1753,9 @@ enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu) { struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); enum amd_dpm_forced_level level; + struct amdgpu_device *adev = smu->adev; - if (!smu_dpm_ctx->dpm_context) + if (!(adev->flags & AMD_IS_APU) && !smu_dpm_ctx->dpm_context) return -EINVAL; mutex_lock(&(smu->mutex)); @@ -1766,8 +1769,9 @@ int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_lev { struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm); int ret = 0; + struct amdgpu_device *adev = smu->adev; - if (!smu_dpm_ctx->dpm_context) + if (!(adev->flags & AMD_IS_APU) && !smu_dpm_ctx->dpm_context) return -EINVAL; ret = smu_enable_umd_pstate(smu, &level); -- 2.7.4 _______________________________________________ amd-gfx mailing list [email protected]<mailto:[email protected]> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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