A good start for baseless is to include the following 2 statements at the top:
IEABRCX DEFINE
IEABRCX ENABLE

The would change most branch instructions to relative branches.

Also, use SYSSTATE ARCHLEVEL=n -- check your manual for the correct value.

Pieter

-----Original Message-----
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On 
Behalf Of Philippe Cloarec
Sent: 12 November 2016 11:10
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: SIIS "issue" after upgrade to z13 machine.

Hi Martin and Rob,

First thx much for your input.  Here are 3 links which relate the "issue" and 
common code for which we fall into a SIIS scenario:
https://www.google.fr/#q=istream_flash_062606_v4
http://s3-us-west-1.amazonaws.com/watsonwalker/ww/wp-content/uploads/2016/03/06173415/18017-The-Cheryl-and-Frank-zRoadshow.pdf
http://conferences.gse.org.uk/attachments/presentations/ibHo4j_1446285934.pdf

Unfortunately I have more than 1000 pgms to review and handle on a short 
timeframe,  so I will have no time to implement "Baseless  processing".   I do 
plan to SAK(Search And Kill) SIIS occurences for scenarios described in above 
links I will find   and implement newer instructions as immediate ones  to 
eliminate memory references and constants in storage as well.

I will check cases where two instructions can be replaced by one only...to use 
CIJE in place of LTR/BZ combination as for example.

Since we do talk of CPU cycles savings here I will check for AGI cases and 
their resolution and try to implement instruction grouping as much I can.

>From my humble point this is a real topic and all z13 sites having old 
>productions Batch programs should perform some action.

regards
Philippe


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