<snip> >>IBM has "Vector" instructions, but the size of a vector is limited to one >>quadword.
>That limitation is not the case for z/Architecture vector operations. </snip> I erred in writing that. Shmuel was of course correct. The "vector register" is 128 bits (one quadword). The extent of the "vectorization" depends on the size of the operands. Peter Relson z/OS Core Technology Design
