Does any one know how the 5 and 10 Mhz bandwidth options work?

This is not 5 Mbits of 'transfer rate', but the bandwidth utilized for 
transmitting the 
digital signal.

Since Atheros has been gobbled up by Qualcomm, the ever 'mum' Atheros on 
technical details 
has become a black hole of nothingness.

I actually would like to know about the ar9k and the ability of that chip set 
to do narrow 
bandwidth operations, but that's even a darker subject than
what is to be found in the ar5k code... at least in the ar5k there's code that 
seems to 
indicate that it supports 5 and 10 Mhz bandwidths.

Thanks
John Clark.

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