P Floding;152401 Wrote: > Read here: > http://www.tnt-audio.com/clinica/jitter1_e.html
According to the reference [10] quoted by the 'tnt' article: http://www.epanorama.net/documents/audio/spdif.html "Small jitter D/A conversion is implemented by using separate PLL clocks for data recover and DAC and by using a buffering between data recovery and DAC. " Which makes sense. The SPDIF signals represent each bit by 2 edge transitions. The original sampling frequency is known (44.1 kHz). Therefore, by buffering the incoming bits a good DAC can eliminate all the jitter introduced in the previous stages, regardless of the origin of the jitter. I can understand that a good power supply is important for the DAC itself, so that it doesn't generate its own jitter. But I don't see why the power supply to the digital sections need to be so perfect. -- Coffee ------------------------------------------------------------------------ Coffee's Profile: http://forums.slimdevices.com/member.php?userid=8198 View this thread: http://forums.slimdevices.com/showthread.php?t=29360 _______________________________________________ audiophiles mailing list audiophiles@lists.slimdevices.com http://lists.slimdevices.com/lists/listinfo/audiophiles
