JohnSwenson;613606 Wrote: > What I do is take the word clock from the S/PDIF receiver and use it to > start a counter which is getting clocked from one of the fixed clocks. > At the end of the word clock I then compare the number comming out of > the counter, I check ranges, if its greater then this number and less > than that number the sample rate 44.1, if its between a differfent set > of numbers its 48 etc. > > I implement this in an FPGA because I'm doing practically everything in > one so its already there. If you don't have an FPGA you could implement > it in a CPLD or a small processor like a PIC. > > John S.
Thank you for the good idea. There is a pic on my DAC board encoding the remote codes for an Apple IRC doing volume control, so its easy to implement this. What DAC IC and digital/analog filter do you use? -- omainik ------------------------------------------------------------------------ omainik's Profile: http://forums.slimdevices.com/member.php?userid=36135 View this thread: http://forums.slimdevices.com/showthread.php?t=85871 _______________________________________________ audiophiles mailing list audiophiles@lists.slimdevices.com http://lists.slimdevices.com/mailman/listinfo/audiophiles
