Hello All, I've have a BeagleBone Black connected with SPI0 to an FPGA and also to it's configuration flash memory device on a cape we are developing. On power up, the FPGA will configure correctly from the serial. (SPIDEV0 is not enabled in the device tree). I can also reprogram the flash with SPI0 at this point. The idea is that either the BBB or the FPGA will talk to the flash and the other will be tri-stated.
I'm using the Adafruit_BBIO driver to communicate with the FPGA over SPI0 (using Python). The issue I have is that when I exit the Python program, the SPI0 pins are still configured for SPI (even after using the SPI.close() function in the program). I'm looking at the cape manager slots after the program exits and SPIDEV0 is now loaded. After that, I'm not able to re-configure the FPGA because the SPI lines are being driven by the BBB. The question is: Is it possible to tri-state the SPI0 lines or switch the SPI0 lines back to GPIO inputs before I exit the python program? Any insight is appreciated. Thanks, Dave David Hunter Sr. Electrical Engineer SkuTek Instrumentation W. Henrietta, NY -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to beagleboard+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
