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• • Re: [Beignet] [PATCH 1/3] do not touch src1 when setting instruction header Song, Ruiling
  • Re: [Beignet] [PATCH 1/3] do not touch src1 when setting instruction header Yang, Rong R
• Re: [Beignet] beignet problem Yang, Rong R
• [Beignet] [PATCH] fix build issue when HAS_BO_SET_SOFTPIN is false Guo, Yejun
  • Re: [Beignet] [PATCH] fix build issue when HAS_BO_SET_SOFTPIN is false Yang, Rong R
• [Beignet] [PATCH 1/2] Backend: Add RegisterFamily for ir Xiuli Pan
  • [Beignet] [PATCH 2/2] Backend: Refine block read/write selection Xiuli Pan
  • Re: [Beignet] [PATCH 1/2] Backend: Add RegisterFamily for ir Guo, Yejun
  • Re: [Beignet] [PATCH 1/2] Backend: Add RegisterFamily for ir Yang, Rong R
• [Beignet] [PATCH v2] Fix bug: Initialize bti of LoadInstuctionPattern::shootByteGatherMsg(). yan . wang
  • Re: [Beignet] [PATCH v2] Fix bug: Initialize bti of LoadInstuctionPattern::shootByteGatherMsg(). Song, Ruiling
  • Re: [Beignet] [PATCH v2] Fix bug: Initialize bti of LoadInstuctionPattern::shootByteGatherMsg(). Yang, Rong R
• [Beignet] [PATCH] Fix bug: Initialize bti of LoadInstuctionPattern::shootByteGatherMsg(). yan . wang
• [Beignet] [PATCH] Fix bug: Initialize bti LoadInstuctionPattern::shootUntypedReadMsg(). yan . wang
• [Beignet] [PATCH V2 4/4] add sends support for byte write Guo, Yejun
• [Beignet] [PATCH V2 2/4] support sends (split send) for untyped write Guo, Yejun
• [Beignet] [PATCH V2 1/4] prepare gen9 sends binary format and enable the ASM dump for sends Guo, Yejun
• [Beignet] [PATCH 4/4] add sends support for byte write Guo, Yejun
• [Beignet] [PATCH 2/4] support sends (split send) for untyped write Guo, Yejun
  • Re: [Beignet] [PATCH 2/4] support sends (split send) for untyped write Song, Ruiling
  • Re: [Beignet] [PATCH 2/4] support sends (split send) for untyped write Guo, Yejun
  • Re: [Beignet] [PATCH 2/4] support sends (split send) for untyped write Song, Ruiling
  • Re: [Beignet] [PATCH 2/4] support sends (split send) for untyped write Guo, Yejun
• [Beignet] [PATCH 3/4] support sends for long write Guo, Yejun
• [Beignet] [PATCH 1/4] prepare gen9 sends binary format and enable the ASM dump for sends Guo, Yejun
  • Re: [Beignet] [PATCH 1/4] prepare gen9 sends binary format and enable the ASM dump for sends Song, Ruiling
  • Re: [Beignet] [PATCH 1/4] prepare gen9 sends binary format and enable the ASM dump for sends Guo, Yejun
  • Re: [Beignet] [PATCH 1/4] prepare gen9 sends binary format and enable the ASM dump for sends Song, Ruiling
  • Re: [Beignet] [PATCH 1/4] prepare gen9 sends binary format and enable the ASM dump for sends Guo, Yejun
• [Beignet] [PATCH 2/2] do not care dst for printf Guo, Yejun
  • Re: [Beignet] [PATCH 2/2] do not care dst for printf Yan Wang
  • Re: [Beignet] [PATCH 2/2] do not care dst for printf Yang, Rong R
• [Beignet] [PATCH 1/2] remove some redundant code for printf Guo, Yejun
  • Re: [Beignet] [PATCH 1/2] remove some redundant code for printf Yan Wang
• [Beignet] [PATCH] Fix getting bitwidth of PointerType of LLVM. yan . wang
  • Re: [Beignet] [PATCH] Fix getting bitwidth of PointerType of LLVM. Yang, Rong R
• [Beignet] [PATCH] Backend: Add help function to get a reg in selection Xiuli Pan
  • Re: [Beignet] [PATCH] Backend: Add help function to get a reg in selection Guo, Yejun
• [Beignet] [PATCH] intel: Check that we can reserve the zero-offset Chris Wilson
  • Re: [Beignet] [PATCH] intel: Check that we can reserve the zero-offset Song, Ruiling
  • Re: [Beignet] [PATCH] intel: Check that we can reserve the zero-offset 'Chris Wilson'
  • Re: [Beignet] [PATCH] intel: Check that we can reserve the zero-offset Song, Ruiling
  • [Beignet] [PATCH] intel: Check that we can reserve the zero-offset Yang Rong
  • Re: [Beignet] [PATCH] intel: Check that we can reserve the zero-offset Song, Ruiling
• [Beignet] [PATCH 1/7] Backend: Fix GenRegister::offset sub reg offset Xiuli Pan
  • [Beignet] [PATCH 4/7] Backend: Refine instruction ID for sel ir Xiuli Pan
  • [Beignet] [PATCH 3/7] Backend: Add kernel name for sel ir output Xiuli Pan
  • [Beignet] [PATCH 6/7] Backend: Add hole reuse in reg alloction Xiuli Pan
  • [Beignet] [PATCH 5/7] Backend: Refine selection IR output Xiuli Pan
  • [Beignet] [PATCH 7/7] Backend: Refine instruction schedule pre reg alloction Xiuli Pan
  • [Beignet] [PATCH 2/7] Backend: Refine flag usage in instrction selection Xiuli Pan
  • Re: [Beignet] [PATCH 2/7] Backend: Refine flag usage in instrction selection Yang, Rong R
• [Beignet] compilation error shiva kumar buvanagiri
  • Re: [Beignet] compilation error Yang, Rong R
• [Beignet] [PATCH 1/2] Add helper functions for device list check. junyan . he
  • [Beignet] [PATCH 2/2] Refine create context APIs. junyan . he
• [Beignet] [PATCH 2/2 V2] Modify all clGetXXXInfo functions using cl_get_info_helper. junyan . he
  • [Beignet] [PATCH 2/2 V2] Modify all clGetXXXInfo functions using cl_get_info_helper. junyan . he
• [Beignet] [PATCH 1/2 V2] Add a helper function for all information get. junyan . he
  • [Beignet] [PATCH 2/2 V2] Modify all clGetXXXInfo functions using cl_get_info_helper. junyan . he
• [Beignet] [PATCH 1/5] Backend: Refine script for math.h Yang Rong
  • [Beignet] [PATCH 2/5] OCL20: add beignet_20.pch and beignet_20.bc. Yang Rong
  • [Beignet] [PATCH 5/5] CMake: add an option to enable OpenCL 2.0. Yang Rong
  • [Beignet] [PATCH 3/5] OCL20: Add __OPENCL_VERSION__ and CL_VERSION_2_0 define. Yang Rong
  • [Beignet] [PATCH 4/5] OCL20: enable -cl-std=CL2.0. Yang Rong
• [Beignet] fatal error: 'ocl.h' file not found Yuan, Shengquan
  • Re: [Beignet] fatal error: 'ocl.h' file not found Pan, Xiuli
• [Beignet] [PATCH] Backend: Fix GenRegister::offset sub reg offset Xiuli Pan
  • Re: [Beignet] [PATCH] Backend: Fix GenRegister::offset sub reg offset Pan, Xiuli
• [Beignet] [PATCH V3 3/3] Backend: Add hole reuse in reg alloction Xiuli Pan
  • Re: [Beignet] [PATCH V3 3/3] Backend: Add hole reuse in reg alloction Song, Ruiling
• [Beignet] [PATCH] GBE: Fix a logical insn with flag bug. Yang Rong
  • Re: [Beignet] [PATCH] GBE: Fix a logical insn with flag bug. Pan, Xiuli
• [Beignet] [PATCH] GBE: Fix assert when get metadata llvm.loop.unroll.enable. Yang Rong
  • Re: [Beignet] [PATCH] GBE: Fix assert when get metadata llvm.loop.unroll.enable. Song, Ruiling
• [Beignet] Problems compiling the OCL20 branch Jesper Puge (s113443)
  • Re: [Beignet] Problems compiling the OCL20 branch Pan, Xiuli
  • Re: [Beignet] Problems compiling the OCL20 branch Jesper Puge (s113443)
  • Re: [Beignet] Problems compiling the OCL20 branch Pan, Xiuli
• [Beignet] [PATCH] disable CMRT as default, since no real case reported Guo, Yejun
  • Re: [Beignet] [PATCH] disable CMRT as default, since no real case reported Guo, Yejun
  • Re: [Beignet] [PATCH] disable CMRT as default, since no real case reported Yang, Rong R
  • Re: [Beignet] [PATCH] disable CMRT as default, since no real case reported Guo, Yejun
• [Beignet] [PATCH] Reduce the compilation time of inline pass in runModulePass(). yan . wang
• [Beignet] [PATCH] libocl: Provide specs required CL_VERSION macros Jan Vesely
  • Re: [Beignet] [PATCH] libocl: Provide specs required CL_VERSION macros Yang, Rong R
• [Beignet] [PATCH V2 00/15] Subgroup short extension patch set Xiuli Pan
  • [Beignet] [PATCH V2 06/15] Utest: Add check subgroup short helper function Xiuli Pan
  • [Beignet] [PATCH V2 02/15] Backend: Refine GenRegiter::offset Xiuli Pan
  • [Beignet] [PATCH V2 11/15] Backend: Add sub groups short shuffle builtin functions Xiuli Pan
  • [Beignet] [PATCH V2 08/15] Backend: Change the sel ir optimization for unpack register Xiuli Pan
  • [Beignet] [PATCH V2 03/15] Backend: Refine register offset for simd shuffle Xiuli Pan
  • [Beignet] [PATCH V2 05/15] Libocl: Add sub group broadcast short builtin function Xiuli Pan
  • [Beignet] [PATCH V2 15/15] Backend: Add A64 subgroup block read/write support Xiuli Pan
  • [Beignet] [PATCH V2 10/15] Utest: Add test case for sub group short builtin functions Xiuli Pan
  • [Beignet] [PATCH V2 04/15] Backend: Refine sub group broadcast code for spec Xiuli Pan
  • [Beignet] [PATCH V2 14/15] Utest: Add subgroup block read/write ushort test case Xiuli Pan
  • [Beignet] [PATCH V2 01/15] Libocl: Add intel_subgroups_short extension Xiuli Pan
  • [Beignet] [PATCH V2 09/15] Backend: Add short sub group builtin functions Xiuli Pan
  • [Beignet] [PATCH V2 12/15] Utest: Add test case for short type sub group shuffle Xiuli Pan
  • [Beignet] [PATCH V2 13/15] Backend: Add subgroup short block read/write Xiuli Pan
  • [Beignet] [PATCH V2 07/15] Utest: Add test case for sub group broadcast short Xiuli Pan
• [Beignet] [PATCH V2 3/3] Backend: Add hole reuse in reg alloction Xiuli Pan
• [Beignet] [PATCH V2 09/14] Backend: Add short sub group builtin functions Xiuli Pan
• [Beignet] [PATCH] Refine clSetMemObjectDestructorCallback API junyan . he
  • [Beignet] [PATCH] Refine clSetMemObjectDestructorCallback API junyan . he
• [Beignet] [PATCH 1/2] rumtime: check all the extension id, not only BASE and OPT1. Chuanbo Weng
• [Beignet] [PATCH 2/2] runtime: set cl_intel_motion_estimation as IVB specifc device extension. Chuanbo Weng
• [Beignet] [PATCH 1/5] Fix a bug of free all_dev when create context. junyan . he
  • [Beignet] [PATCH 3/5] Refine clRetain/Release MemObject junyan . he
  • [Beignet] [PATCH 4/5] Refine clCreateSampler API. junyan . he
  • [Beignet] [PATCH 2/5] refine clCreateCommandQueue and clRetainCommandQueue. junyan . he
  • [Beignet] [PATCH 5/5] Refine retain/release sampler API junyan . he
• [Beignet] [PATCH] Fix build failure with CMRT enabled Rebecca N. Palmer
  • Re: [Beignet] [PATCH] Fix build failure with CMRT enabled Guo, Yejun
• [Beignet] [PATCH 01/14] Libocl: Add intel_subgroups_short extension Xiuli Pan
  • [Beignet] [PATCH 04/14] Backend: Refine sub group broadcast code for spec Xiuli Pan
  • [Beignet] [PATCH 02/14] Backend: Refine GenRegiter::offset Xiuli Pan
  • [Beignet] [PATCH 07/14] Utest: Add test case for sub group broadcast short Xiuli Pan
  • [Beignet] [PATCH 12/14] Utest: Add test case for short type sub group shuffle Xiuli Pan
  • [Beignet] [PATCH 14/14] Utest: Add subgroup block read/write ushort test case Xiuli Pan
  • [Beignet] [PATCH 11/14] Backend: Add sub groups short shuffle builtin functions Xiuli Pan
  • [Beignet] [PATCH 05/14] Libocl: Add sub group broadcast short builtin function Xiuli Pan
  • [Beignet] [PATCH 13/14] Backend: Add subgroup short block read/write Xiuli Pan
  • [Beignet] [PATCH 08/14] Backend: Change the sel ir optimization for unpack register Xiuli Pan
  • [Beignet] [PATCH 09/14] Backend: Add short sub group builtin functions Xiuli Pan
  • [Beignet] [PATCH 06/14] Utest: Add check subgroup short helper function Xiuli Pan
  • [Beignet] [PATCH 03/14] Backend: Refine register offset for simd shuffle Xiuli Pan
  • [Beignet] [PATCH 10/14] Utest: Add test case for sub group short builtin functions Xiuli Pan
• [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Igor Pavlov
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Pan, Xiuli
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Igor Pavlov
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Pan, Xiuli
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Igor Pavlov
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Pan, Xiuli
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Koop Mast
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Igor Pavlov
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Rebecca N. Palmer
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Igor Pavlov
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Rebecca N. Palmer
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Igor Pavlov
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Rebecca N. Palmer
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Igor Pavlov
  • Re: [Beignet] Weird clinfo ouput @ FreeBSD-11.0/Intel GPU Rebecca N. Palmer
• [Beignet] OpenCL compilation bug/assert Hugh Perkins
• [Beignet] [PATCH] Add multi devices support in context. junyan . he
  • [Beignet] [PATCH] Add multi devices support in context. junyan . he
• [Beignet] [PATCH 1/4] Refine retain/release context api. junyan . he
  • [Beignet] [PATCH 2/4] Modify clGetMemObjectInfo using cl_get_info_helper. junyan . he
  • [Beignet] [PATCH 3/4] Modify clGetImageInfo using cl_get_info_helper. junyan . he
  • [Beignet] [PATCH 4/4] Refine clCreateContext and clCreateContextFromType function. junyan . he
• [Beignet] [PATCH v2] Fix build with latest libdrm Armin K
  • Re: [Beignet] [PATCH v2] Fix build with latest libdrm Igor Gnatenko
  • Re: [Beignet] [PATCH v2] Fix build with latest libdrm Armin K.
  • Re: [Beignet] [PATCH v2] Fix build with latest libdrm Yang, Rong R
• [Beignet] [PATCH 1/2] Modify clGetSamplerInfo using cl_get_info_helper. junyan . he
  • [Beignet] [PATCH 2/2] Modify program Info using cl_get_info_helper. junyan . he
• [Beignet] [PATCH] Utests: respect existing C/CXXFLAGS Rebecca N. Palmer
  • Re: [Beignet] [PATCH] Utests: respect existing C/CXXFLAGS Yang, Rong R
• [Beignet] [PATCH] Utests: Allow testing cl_intel_accelerator via ICD Rebecca N. Palmer
  • Re: [Beignet] [PATCH] Utests: Allow testing cl_intel_accelerator via ICD Weng, Chuanbo
  • Re: [Beignet] [PATCH] Utests: Allow testing cl_intel_accelerator via ICD Rebecca N. Palmer
  • Re: [Beignet] [PATCH v3] Utests: Allow testing cl_intel_accelerator via ICD Rebecca N. Palmer
  • Re: [Beignet] [PATCH v3] Utests: Allow testing cl_intel_accelerator via ICD Weng, Chuanbo
  • Re: [Beignet] [PATCH v4] Utests: Allow testing cl_intel_accelerator via ICD Rebecca N. Palmer
  • Re: [Beignet] [PATCH v4] Utests: Allow testing cl_intel_accelerator via ICD Weng, Chuanbo
  • Re: [Beignet] [PATCH v4] Utests: Allow testing cl_intel_accelerator via ICD Yang, Rong R
• [Beignet] [PATCH] Utests: Don't end an all-tests run when one test fails Rebecca N. Palmer
  • Re: [Beignet] [PATCH] Utests: Don't end an all-tests run when one test fails Yang, Rong R
• [Beignet] [PATCH] Utests: use clGetExtensionFunctionAddressForPlatform Rebecca N. Palmer
  • Re: [Beignet] [PATCH] Utests: use clGetExtensionFunctionAddressForPlatform Yang, Rong R
• [Beignet] [PATCH] Add clGetKernelSubGroupInfoKHR to _cl_icd_dispatch table Rebecca N. Palmer
  • Re: [Beignet] [PATCH] Add clGetKernelSubGroupInfoKHR to _cl_icd_dispatch table Yang, Rong R
  • Re: [Beignet] [PATCH] Add clGetKernelSubGroupInfoKHR to _cl_icd_dispatch table Rebecca N. Palmer
  • Re: [Beignet] [PATCH] Add clGetKernelSubGroupInfoKHR to _cl_icd_dispatch table Pan, Xiuli
  • Re: [Beignet] [PATCH] Add clGetKernelSubGroupInfoKHR to _cl_icd_dispatch table Rebecca N. Palmer
  • Re: [Beignet] [PATCH] Add clGetKernelSubGroupInfoKHR to _cl_icd_dispatch table Yang, Rong R
• [Beignet] [PATCH] Docs: Spelling and grammar fixes Rebecca N. Palmer
  • Re: [Beignet] [PATCH] Docs: Spelling and grammar fixes Yang, Rong R
  • Re: [Beignet] [PATCH] Docs: Spelling and grammar fixes Yang, Rong R
• [Beignet] [PATCH 7/7 V2] Modify clGetDeviceInfo using cl_get_info_helper. junyan . he
• [Beignet] [PATCH 1/7] Add a helper function for all information get. junyan . he
  • [Beignet] [PATCH 2/7] Modify clGetEventInfo using cl_get_info_helper. junyan . he
  • [Beignet] [PATCH 3/7] Modify clGetPlatformInfo using cl_get_info_helper. junyan . he
  • [Beignet] [PATCH 7/7] Modify clGetDeviceInfo using cl_get_info_helper. junyan . he
  • [Beignet] [PATCH 4/7] Modify clGetKernelInfo using cl_get_info_helper. junyan . he
  • [Beignet] [PATCH 5/7] Modify clGetCommandQueueInfo using cl_get_info_helper. junyan . he
  • [Beignet] [PATCH 6/7] Modify clGetContextInfo using cl_get_info_helper. junyan . he
• [Beignet] [PATCH] buildsys: Use CMRT_LIBDIR instead of CMRT_LIBRARY_DIRS Armin K
  • Re: [Beignet] [PATCH] buildsys: Use CMRT_LIBDIR instead of CMRT_LIBRARY_DIRS Guo, Yejun
  • Re: [Beignet] [PATCH] buildsys: Use CMRT_LIBDIR instead of CMRT_LIBRARY_DIRS Armin K.
  • Re: [Beignet] [PATCH] buildsys: Use CMRT_LIBDIR instead of CMRT_LIBRARY_DIRS Guo, Yejun
  • Re: [Beignet] [PATCH] buildsys: Use CMRT_LIBDIR instead of CMRT_LIBRARY_DIRS Armin K.
  • Re: [Beignet] [PATCH] buildsys: Use CMRT_LIBDIR instead of CMRT_LIBRARY_DIRS Guo, Yejun
  • Re: [Beignet] [PATCH] buildsys: Use CMRT_LIBDIR instead of CMRT_LIBRARY_DIRS Yang, Rong R
• [Beignet] [PATCH] Fix build with latest libdrm Armin K
  • Re: [Beignet] [PATCH] Fix build with latest libdrm Rebecca N. Palmer
  • Re: [Beignet] [PATCH] Fix build with latest libdrm Armin K.
• [Beignet] [PATCH 1/3] Backend: Add kernel name for sel ir output Xiuli Pan
  • [Beignet] [PATCH 3/3] Backend: Add hole reuse in reg alloction Xiuli Pan

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