Hi: Also how does one implement SMP via hardware and NOT software? Is this > a portable approach to do SMP? Will this approach allow SMP on Intel, > AMD, ARM, POWER, and RISC chips? >
I'm reading about Intel processor can be configured to run in multicore mode. I don't know how can I do It yet, but this can be more efficient than a software implementation and may solve many concurrency problems. El mié., 29 ago. 2018 a las 22:56, Joshua Branson (<jbra...@fastmail.com>) escribió: > Almudena Garcia <liberamenso10...@gmail.com> writes: > > > Hi all: > > > > I'm reading about you're interested in contributing with Hurd and > practice with C. > > > > I have an interesting project, about implement SMP support in Hurd. > Currently, Mach has a little support to multiprocessing, but this is old > and very buggy. > > > > A friend has said me that It's possible to implement SMP support via > hardware, instead use software techniques, and I would try this project. > > > > If any person can tutorize me and contribute, I will be grateful. > > > > I can probably encourage you for this project, but I'm not sure if I'd > be able to help very well. I'm still on the struggle bus with the Hurd > development. I have a ever growing Hurd cheatsheet, but I am no CS > major. > > Also how does one implement SMP via hardware and NOT software? Is this > a portable approach to do SMP? Will this approach allow SMP on Intel, > AMD, ARM, POWER, and RISC chips? > > Honestly, I could probably just spend some time trying to update the > Hurd wiki. A lot of places just need some documentation updates. Like > a lot. hahaha. > >
