I've said It yet.

> As this
> form, we don't need to know how many cores has the processor and set the
> core number in Mach in compilation time. Instead, the same processor will
> detect the cores number and configure SMP automatically.

I don't know the exact assembly instructions, but I read about the
processor can be configured from assembly to run in multicore mode.
Then, what we had to do is to write a routine that initializes the
processor with this multicore support, during Mach boot.

In this guide, in Chapter 8.4 feels to be a better explanation about how to
do this (initialization example in 8.4.4):
https://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.html






El jue., 30 ago. 2018 a las 17:35, Richard Braun (<rbr...@sceen.net>)
escribió:

> On Thu, Aug 30, 2018 at 05:32:40PM +0200, Almudena Garcia wrote:
> > Excuse me, It's a little offtopic.
> >
> > I was talking about implement SMP via hardware in Hurd (Mach really). In
> > this implementation, Mach configures the processor during the boot,
> > enabling multicore support. (All Pentium 4 or modern x86 processor
> supports
> > this)
> >
> > In the current SMP support, this multicore support feels been build from
> > software, generating the threads and assigning It to the processor from
> > software. Then, my idea is to start a project to change this SMP software
> > to a newer implementation via hardware, as I previously said.  As this
> > form, we don't need to know how many cores has the processor and set the
> > core number in Mach in compilation time. Instead, the same processor will
> > detect the cores number and configure SMP automatically.
> >
> > https://c9x.me/x86/html/file_module_x86_id_45.html
> >
> >
> https://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-software-developer-vol-3a-part-1-manual.html
>
> What is "a newer implementation via hardware" ? Can you be very specific
> about what you're referring to ?
>
> --
> Richard Braun
>

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