#3433: Add SMP support for RISC-V
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Reporter: Sebastian Huber | Owner: Sebastian Huber
Type: project | Status: accepted
Priority: normal | Milestone: 6.1
Component: arch/riscv | Version:
Severity: normal | Resolution:
Keywords: | Blocked By: 3452, 3453, 3459
Blocking: |
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Comment (by Sebastian Huber <sebastian.huber@…>):
In [changeset:"9704d86f86c5a800a06dd814538df4cd83367fc5/rtems"
9704d86f/rtems]:
{{{
#!CommitTicketReference repository="rtems"
revision="9704d86f86c5a800a06dd814538df4cd83367fc5"
riscv: Enable interrupts during dispatch after ISR
The code sequence is derived from the ARM code
(see _ARMV4_Exception_interrupt).
Update #2751.
Update #3433.
}}}
--
Ticket URL: <http://devel.rtems.org/ticket/3433#comment:27>
RTEMS Project <http://www.rtems.org/>
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