Sebastian Huber pushed new commits to merge request !255 Merge request URL: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/255
* c388c3d1 - bsps/arm: Add missing GICv3 distributor registers * dd3bc5bf - bsps: Remove superfluous include * fb87d689 - bsps/aarch64: Customize EL2/EL3 start support * 4bcb5cda - aarch64: Split exception support * fd19d778 - aarch64: Move exception frame support * 922befa8 - dev/irq: Simplify GICv2 set/get affinity * 19c5157b - bsps: Assembly implementation for PSCI bsp_reset() * 0c646dfa - aarch64/xilinx-zynqmp: Simplify startup * 17de6ef9 - aarch64/xilinx-zynqmp: Move get I2C clocks * 798f47b6 - aarch64: More robust SMP system start * 799f74c1 - arm/aarch64: Optimize _CPU_SMP_Send_interrupt() * 26105928 - dev/irq: Remove arm_gic_irq_generate_software_irq() * ad3c9e1b - aarch64: Remove trapped FP exceptions support * 2e449193 - bsps: Move <bsp/linker-symbols.h> to shared * d759f1ad - dev/irq: Simplify SMP GIC initialization * 89ecc929 - bsps/aarch64: Use fatal error for data cache disable * fab49f65 - bsps/aarch64: Simplify I-cache invalidate * 6d5e2bea - bsps/aarch64: Fix AArch64_get_ccsidr_for_level() * 9c97d567 - bsps/aarch64: Simplify AArch64_clidr_get_cache_type() * 3e242783 - bsps/aarch64: Fix entire data cache flush/invalidate -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/255 You're receiving this email because of your account on gitlab.rtems.org.
_______________________________________________ bugs mailing list [email protected] http://lists.rtems.org/mailman/listinfo/bugs
