Sam Price started a new discussion on bsps/microblaze/microblaze_fpga/include/tm27.h: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/980#note_140649 > - } while (0) > + /* > + * Program timer1 in generate mode: > + * - Write TLR1 with the one-shot interval. > + * - Pulse LOAD to transfer TLR1 into the counter. > + * - Set ENT to start the counter. The interrupt fires on rollover and the > + * TINT bit is cleared by writing a 1 to it. > + * > + * Give the one-shot a chance to fire before returning. In QEMU, the > Xilinx > + * timer model schedules expiry on the virtual clock, so a tiny one-shot > + * (TLR = 1) does not assert immediately on ENT; the guest must run long > + * enough for at least one timer tick to elapse. > + * Empirically, ~7000 nops was the last failing point; doubled to 14000 > + * to add margin. > + */ > + for ( spin = 0; spin < 14000; ++spin ) { Maybe we should pull a bit so (spin < 14000 || handler_serviced != 1) -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/980#note_140649 You're receiving this email because of your account on gitlab.rtems.org.
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