Gedare Bloom created a merge request: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1181
Project:Branches: gedare/rtems:riscv-bsp-get-memory to rtems/rtos/rtems:main Author: Gedare Bloom Assignee: Gedare Bloom ## Summary riscv: use configured RAM region if defined Use the configuration values for RISCV_RAM_REGION_BEGIN and RISCV_RAM_REGION_SIZE to determine the workspace instead of using the FDT or linker variables. Fixes #5545. ## Generative AI none <!-- If you have used AI please use the "AI Contribution" template otherwise leave this blank see our fulls statement at https://www.rtems.org/generative-ai/--> <!-- Default settings, if it is a dropdown it will set after submission --> -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1181 You're receiving this email because of your account on gitlab.rtems.org.
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