Gedare Bloom created a merge request: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1333
Project:Branches: gedare/rtems:riscv-va to rtems/rtos/rtems:main Author: Gedare Bloom Assignee: Gedare Bloom ## Summary riscv: set defaults for RISCV_MMU_VIRTUAL_ADDRESS_BITS Use 32 for rv32 ABI and otherwise use 39 bit virtual addresses. Fixes #5630 ## Generative AI n <!-- If you have used AI please use the "AI Contribution" template otherwise leave this blank see our fulls statement at https://www.rtems.org/generative-ai/--> <!-- Default settings, if it is a dropdown it will set after submission --> -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1333 You're receiving this email because of your account on gitlab.rtems.org. Unsubscribe from this thread: https://gitlab.rtems.org/-/sent_notifications/4-2i67ns0gwtb5ttk54v5zth51r-1d/unsubscribe | Manage all notifications: https://gitlab.rtems.org/-/profile/notifications | Help: https://gitlab.rtems.org/help
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