Chris Johns commented on a discussion on cpukit/include/dev/gpio/gpio.h: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1499#note_159828 > + * > + * The pin must already be configured with a trigger other than > + * #RTEMS_GPIO_TRIGGER_NONE. > + * > + * @param fd is the descriptor for the controller's device node. > + * > + * @param pin is the logical pin whose interrupt to deliver. > + * > + * @param handler is the handler to call. > + * > + * @param arg is the argument to pass to the handler. > + * > + * @retval 0 Successful operation. > + * @retval -1 An error occurred. The errno is set to indicate the error. > + */ > +int rtems_gpio_pin_irq_enable(int fd, uint32_t pin, I am confused. Why would a user add a PCI end point device to a root port and expect interrupt to be handled by this API? Normally root port devices for PCIe (I assume this is PCIe) manage their interrupts as a device and end points send an MSI? I suggest shared interrupts on a pin be added as an add-on. -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1499#note_159828 You're receiving this email because of your account on gitlab.rtems.org. Unsubscribe from this thread: https://gitlab.rtems.org/-/namespace/49/sent_notifications/5-69cwfm2iadwkvz5ngrqfg7wys-1d/unsubscribe | Manage all notifications: https://gitlab.rtems.org/-/profile/notifications | Help: https://gitlab.rtems.org/help
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