Sebastian Huber created a merge request: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1571
Project:Branches: sebhub/rtems:up/riscv-time-csr to rtems/rtos/rtems:main Author: Sebastian Huber ## Summary **Problem:** In machine mode, the CPU counter and the clock driver read the `mtime` register of the CLINT over the bus. The GR765 implements the `time` CSR, which each hart reads in the pipeline with the same value. Some tests also fail on the GR765 and the GRISCV BSPs. **Fix:** - Add the CPU option `RISCV_USE_TIME_CSR`, and enable it by default for `riscv/gr765`. The timer compare stays in the CLINT. - Read the 64-bit `time` CSR on rv32 in S-mode. - Install the clock interrupt through a static interrupt entry. - Enable the tm27 timer interrupt on each processor. - Let the GRISCV BSP raise and clear interrupts, and make its `BSP_poll_char()` non-blocking. - Skip a processor without a scheduler in the SMP-only scheduler validation test, which failed with more than four processors. **Review hints:** - The option is shared by all riscv BSPs. The clock drivers of `griscv`, `niosv` and `esp32` define their own `_CPU_Counter_read()`, so they do not support the option yet. - !1535 also contains "Raise and clear GRISCV interrupts". Only one of the two MRs should keep it. ## Test | Check | Result | | --- | --- | | `riscv/gr765`, `riscv/gr765` with SMP, `riscv/griscv`, `riscv/rv64imafdc` | no build warnings | | All validation suites of `gr765`, `gr765` SMP (8 harts) and `griscv` plus 13 clock tests on SIS | 103 of 103 pass; on `main`, 5 suites fail and 2 of them hang | ## AI Details <!-- Make sure you have read our statement at https://www.rtems.org/generative-ai/ --> ### Prompt used None as a single prompt. The work was done in an interactive Claude Code session on the RTEMS tree. Each change was directed and reviewed. ### AI model used Claude Opus 5.5 (claude-opus-5-5), through Claude Code. ### How AI was used for the contribution - ( ) Formatting - ( ) Test creation. - (x) Code comments. - ( ) The entire contribution was generated using AI - ( ) AI code completion such as Copilot in VSCode. The implementation was produced in that session under my direction, and the commit messages were drafted there. ### Access I have not used a product which claims copyright in its output, and I have legitimate access to the one I used. -- View it on GitLab: https://gitlab.rtems.org/rtems/rtos/rtems/-/merge_requests/1571 You're receiving this email because of your account on gitlab.rtems.org. Unsubscribe from this thread: https://gitlab.rtems.org/-/namespace/49/sent_notifications/6-9krvfiedrua40ml3gq09vy67j-1d/unsubscribe | Manage all notifications: https://gitlab.rtems.org/-/profile/notifications | Help: https://gitlab.rtems.org/help
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