[email protected] (Ben Kloosterman) on Thursday, February 25, 2010 wrote: >... with LRU >being almost useless these days ( due to user app GCs walking pages or caches >where the least >recently used page is the prime candidate for next use)
I thought all processor chips used LRU (approximation) to manage their L1 and L2 caches, or am I out of date? Cheers - Bill ----------------------------------------------------------------------- Bill Frantz | gets() remains as a monument | Periwinkle (408)356-8506 | to C's continuing support of | 16345 Englewood Ave www.pwpconsult.com | buffer overruns. | Los Gatos, CA 95032 ------------------------------------------------------------------------------ Download Intel® Parallel Studio Eval Try the new software tools for yourself. Speed compiling, find bugs proactively, and fine-tune applications for parallel performance. See why Intel Parallel Studio got high marks during beta. http://p.sf.net/sfu/intel-sw-dev _______________________________________________ CapROS-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/capros-devel
