> Hi all: > > I just could not find any documents in casper web site talking about the > control software running in the PowerPC. > > So my first question is how can I use the interface between FPGA and > PowerPC? For example, how can I design a block memory which can be written > by ADC module and can be read by PowerPC?
You use the yellow blocks. They have built-in software modules that get loaded into the tinyshell running on the board. For more info, build the ibob flashing-lights tutorial, then use bee_xps to build it. Then look through the directories created by the build process. You will see C code that has been set up and linked into the shell for you to access. On an ibob, you can use either a direct serial cable or, if you include the lwip block, a telnet interface to the shell. The software register block is another yellow block used to directly get or set a register in the FPGA fabric. I highly recommend spending the time to go through all the video lectures for an overview of all the tools. For your specific example request, use the ADC block --> shared BRAMS, which you can then read with the PPC. You'll need an address counter, and a bit to arm/reset the counter. See the snap block for an example from the library. (You could also just use a snap block on each ADC output...) > The second question is there are only external PowerPC on the ROACH. So > the PowerPC firmware can not be loaded by FPGA bitstream. So how the > PowerPC firmware will be loaded in the ROACH? How the software will be > customized according the FPGA configuration? Excellent question! I'd like to know this, too, but I think it will just work, like the rest of the system does now... > > The third question is I can not find ROACH software fold. Anybody could > tell me when it could be available? It will be done soon, I think. But it's not yet released! It will be supported under the 10.1 Xilinx tool release. John > > Thanks > > Wan >
