Suraj,
You are right, those ngc files do not exist, but System Generator
reports successful compilation. Any hint on what I could check for?
m
ps I didn't notice that reply-to was not set to the casper list ...
-------- Original Message --------
Subject: Re: [casper] bee_xps fails when building tutorial 3 for Roach
Date: Tue, 10 Aug 2010 17:59:37 -0700
From: Suraj Gowda <[email protected]>
To: Mandana Amiri <[email protected]>
References: <[email protected]>
<[email protected]>
<[email protected]>
<[email protected]>
<[email protected]>
Do you see a file named
dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1.ngc? As the name implies,
it's a distributed memory. I know it's from the unscrambler because of the
net name given in the Xilinx error message. You're right that it can't find
a block name, but any block it can't find a hdl definition for is assumed
to be a Xilinx primitive (which this is not.) or blackboxed in a .ngc
An .ngc file is generated only for Xilinx primitives, which is why there
isn't one for the FFT/PFB.
Also, try to reply-all to the list, lots of people are unfamiliar with
Xilinx tools.
-Suraj
On Tue, 10 Aug 2010 17:30:56 -0700, Mandana Amiri <[email protected]>
wrote:
Suraj,
Which ngc file do I need to check for? There are many ngc files, but
none for fft_wideband or pfb.
Aren't those labels block names as oppose to ngc filenames?
Thanks for your help,
m
Suraj Gowda wrote:
Hi Mandana,
Your error is not a Simulink error. It seems that Xilinx's synthesizer
can't find the distributed RAM block used in the ROM for the FFT
unscrambler. Check in the XPS_ROACH_base/implementation for your
design
and see if you can find the ngc netlists that it mentions. If not,
system
generator may not have finished properly.
-Suraj
On Tue, 10 Aug 2010 16:20:11 -0700 (PDT), [email protected] wrote:
Hi Mark,
When I load the new mdl and use latest git libraries, I get many
warnings
about SID and LibraryVersion which I assume are fine. Then bee_xps
gives
the same 9 errors as before. See below.
Any ideas?
Thanks,
Mandana
<snip>
Warning: In instantiating linked block
'r_spec_2048_r105/fft_wideband_real1/fft_biplex_real_4x0/biplex_core/fft_stage_1/Delay'
: Xilinx
Delay Block block (mask) does not have a parameter named
'LibraryVersion'.
Warning: In instantiating linked block
'r_spec_2048_r105/fft_wideband_real1/fft_biplex_real_4x0/biplex_core/fft_stage_1/Counter'
:
Xilinx Counter Block block (mask) does not have a parameter named
'SID'.
Warning: In instantiating linked block
'r_spec_2048_r105/fft_wideband_real1/fft_biplex_real_4x0/biplex_core/fft_stage_1/Counter'
:
Xilinx Counter Block block (mask) does not have a parameter named
'LibraryVersion'.
<snip>
after bee_xps:
<snip>
Annotating Constraints...
...
Checking Partitions
....
...
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real1_a035821448/fft_unscrambler_d229b5935a/reorder_89
51e0b30c/map9/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved. A
pin name misspelling can cause this, a missing edif or ngc file, or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real1_a035821448/fft_unscrambler_d229b5935a/reorder_89
51e0b30c/map8/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved. A
pin name misspelling can cause this, a missing edif or ngc file, or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real1_a035821448/fft_unscrambler_d229b5935a/reorder_89
51e0b30c/map7/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved. A
pin name misspelling can cause this, a missing edif or ngc file, or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real1_a035821448/fft_unscrambler_d229b5935a/reorder_89
51e0b30c/map6/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved. A
pin name misspelling can cause this, a missing edif or ngc file, or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real1_a035821448/fft_unscrambler_d229b5935a/reorder_89
51e0b30c/map5/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved. A
pin name misspelling can cause this, a missing edif or ngc file, or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real1_a035821448/fft_unscrambler_d229b5935a/reorder_89
51e0b30c/map4/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved. A
pin name misspelling can cause this, a missing edif or ngc file, or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real1_a035821448/fft_unscrambler_d229b5935a/reorder_89
51e0b30c/map3/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved. A
pin name misspelling can cause this, a missing edif or ngc file, or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real1_a035821448/fft_unscrambler_d229b5935a/reorder_89
51e0b30c/map2/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved. A
pin name misspelling can cause this, a missing edif or ngc file, or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real1_a035821448/fft_unscrambler_d229b5935a/reorder_89
51e0b30c/map1/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved. A
pin name misspelling can cause this, a missing edif or ngc file, or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
....
....more warnings
....
....Partition Implementation Status
-------------------------------
No Partitions were found in this design.
-------------------------------
NGDBUILD Design Results Summary:
Number of errors: 9
Number of warnings: 2199
Total REAL time to NGDBUILD completion: 49 sec
Total CPU time to NGDBUILD completion: 28 sec
One or more errors were found during NGDBUILD. No NGD file will be
written.
Writing NGDBUILD log file "system.bld"...
ERROR:Xflow - Program ngdbuild returned error code 2. Aborting flow
execution...
gmake: *** [__xps/system_routed] Error 1
ERROR:EDK - Error while running "gmake -f system.make bits".
Return code = 2
No changes to be saved in MSS file
Saved project XMP file
cp: cannot stat `implementation/system.bit': No such file or directory
bit file open failed
chmod: cannot access `implementation/system.bof': No such file or
directory
cp: cannot stat `implementation/system.bof': No such file or directory
Error using ==> gen_xps_files at 689
Programation files generation failed, EDK compilation probably also
failed.
Hi Mandana,
Thanks for trying this out. I just looked at the design, and it
appears
I
didn't
update it with the newest fft and pfb. I just now did this. Can you
svn co
http://casper.berkeley.edu/svn/trunk/ref_designs_tutorials/workshop_2010/roach_tut3_wideband_spec/
and using the newest clone of mlib_dewel, try and compile the r105
model
file?
It just worked for me.
If you're still having issues, let me know.
Thanks,
Mark
On Mon, Aug 9, 2010 at 3:22 PM, <[email protected]> wrote:
Hi,
I am trying to build the wideband spectrometer mdl file for Roach
and
when
I run bee_xps, it fails. Errors are listed below. I tried this with
the
latest mlib_devel10.1 from svn and also with mlib_devel cloned from
git
and they both fail the same way. (I can not locate
'ref_designs_tutorials'
directory in git, but I assume the latest svn version is fine).
I noticed that when I open the tut3 mdl file, there are broken links
in
the fft and pfb blocks, so I deleted these blocks and replaced them
with
new ones from the library. The PFB block has an additional
parameter:
Fold
adders into DSPs and I leave it as checked!
Any chance you have seen this error before? Please advise.
Thanks
Mandana
ps I can successfully build tutorial 1 and iADC tutorial
pss For Tutorial 3, if I just go to system Generator block and press
generate, it finishes with comiled successfully. However, bee_xps
fails
--------------------------------- Version Log -------------
Version Path
System Generator 11.5.2275 /opt/Xilinx/11.1/DSP_Tools/lin64/sysgen
AccelDSP 11.5.2275
/opt/Xilinx/11.1/DSP_Tools/lin64/AccelDSP
Matlab 7.7.0.471 (R2008b) /usr/local/matlab_2008b
ISE 11.5.i /opt/Xilinx/11.1/ISE
and in xflow.log I have:
<snip>
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b
a0a1129/map9/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved.
A
pin name misspelling can cause this, a missing edif or ngc file,
or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b
a0a1129/map8/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved.
A
pin name misspelling can cause this, a missing edif or ngc file,
or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b
a0a1129/map7/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved.
A
pin name misspelling can cause this, a missing edif or ngc file,
or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b
a0a1129/map6/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved.
A
pin name misspelling can cause this, a missing edif or ngc file,
or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b
a0a1129/map5/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved.
A
pin name misspelling can cause this, a missing edif or ngc file,
or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b
a0a1129/map4/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved.
A
pin name misspelling can cause this, a missing edif or ngc file,
or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b
a0a1129/map3/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved.
A
pin name misspelling can cause this, a missing edif or ngc file,
or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b
a0a1129/map2/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved.
A
pin name misspelling can cause this, a missing edif or ngc file,
or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
ERROR:NgdBuild:604 - logical block
'r_spec_2048_r105_XSG_core_config/r_spec_2048_r105_XSG_core_config/r_spec_204
8_r105_x0/fft_wideband_real_b9aab9e8c9/fft_unscrambler_d7ee91cd7f/reorder_71b
a0a1129/map1/comp5.core_instance5/BU2' with type
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' could not be
resolved.
A
pin name misspelling can cause this, a missing edif or ngc file,
or
the
misspelling of a type name. Symbol
'dmg_43_c2a1bee36c7e7174_dist_mem_gen_v4_3_xst_1' is not supported
in
target
'virtex5'.
<snip>
Partition Implementation Status
-------------------------------
No Partitions were found in this design.
-------------------------------
NGDBUILD Design Results Summary:
Number of errors: 9
Number of warnings: 2243
Total REAL time to NGDBUILD completion: 49 sec
Total CPU time to NGDBUILD completion: 28 sec
One or more errors were found during NGDBUILD. No NGD file will be
written.
Writing NGDBUILD log file "system.bld"...
ERROR:Xflow - Program ngdbuild returned error code 2. Aborting flow
execution...
gmake: *** [__xps/system_routed] Error 1
ERROR:EDK - Error while running "gmake -f system.make bits".
Return code = 2
No changes to be saved in MSS file
Saved project XMP file
cp: cannot stat `implementation/system.bit': No such file or
directory
bit file open failed
chmod: cannot access `implementation/system.bof': No such file or
directory
cp: cannot stat `implementation/system.bof': No such file or
directory
Error using ==> gen_xps_files at 689
Programation files generation failed, EDK compilation probably also
failed.
