hi gerry, you might be interested in aaron's paper about in place corner turners:
https://casper.berkeley.edu/wiki/Papers Parsons, A., The Symmetric Group in Data Permutation, with Applications to a High-Bandwidth Streaming FFT Architecture,<http://setiathome.berkeley.edu/~aparsons/papers/2008-06-11_Permuting_Buffers_Paper.pdf> June 2008 one of the simplest ways to do an in place corner turn is to write the data in one row at a time, and then read it out one column at a time. as you read out the columns you write the next block of data one column at a time, and then read it out by rows, then repeat this whole sequence. there are some clever ways to do this same thing for bit reversal or any general data permuting. there are also some clever ways to use DRAM without having to refresh..... best wishes, dan On Sat, Mar 2, 2013 at 4:12 PM, Gerry Harp <gh...@seti.org> wrote: > Hi Ryan > > Can you say a few words about how the in-place corner turner works? I'd be > fascinated to hear. > > Thanks > > Gerry > > On 3/1/2013 11:28 AM, David MacMahon wrote: > >> Thanks, Ryan, >> >> The problem was actually in the integration buffers. We were using QDR >> vector accumulators and the vector was too long for the smaller chips. >> Anyway, the design has since been retired so it's a moot point for us now, >> but the in-place QDR corner turn sounds interesting! >> >> Dave >> >> On Mar 1, 2013, at 10:37 AM, Ryan Monroe wrote: >> >> Hey David, >>> >>> I know it's probably too late, but I figured out how to do a QDR-corner >>> turn without ping-ponging (thus, doubling the effective size of the QDR). >>> Give me a shout if you need this in the future! >>> >>> On 03/01/2013 10:23 AM, David MacMahon wrote: >>> >>>> Hi, Jack, >>>> >>>> We noticed that one of our designs gave bogus results when run on a >>>> ROACH 1 board with a serial number in the range 02XXXX, but valid results >>>> when run on a ROACH 1 board with a serial number in the ranges 03XXXX or >>>> 04XXXX. >>>> >>>> After much head scratching, we opened up one 02xxxx, one 03xxxx, and >>>> one 04xxxx roach. The 02xxxx roach (020247) had Cypress CY7C1263V18 QDR >>>> chips, which are 2Mx18 bits. The 03xxxx roach (030144) had Cypress >>>> CY7C15632KV18 chips, which are 4Mx18. The 04xxxx roach (040122) had NEC >>>> D44647186AF5-E25 QDR chips, which are also 4Mx18. >>>> >>>> The 2Mx18 bit QDR chips of the 02xxxx roaches can only store 1M >>>> (1,048,576) 32-bit words which was too small for our design. >>>> >>>> Hope this helps, >>>> Dave >>>> >>>> On Mar 1, 2013, at 12:27 AM, Jack Hickish wrote: >>>> >>>> Hi All, >>>>> >>>>> Is someone able to confirm that the size of the QDR chips on ROACH 1 >>>>> boards depends solely on the board version? If this is indeed the case, >>>>> does anyone know the QDR specs for the different board iterations? >>>>> >>>>> >>>>> Cheers, >>>>> Jack >>>>> >>>> >>> >> > -- > ---------------------- > Gerald R. Harp, Ph.D. > Director, Center for SETI Research > SETI Institute > > >
