Hello Casperites I'm looking for advice. We are at the point of launching into a wideband spectrometer project for building ROACH-2 based spectrometers to handle 32 independent front-end inputs. This is a conventional spectrometer (no cross-correlations needed). Our maximum bandwidth needed is 800 MHz. We are also interested in modes of bandwidth 200 and 400 MHz. I should note that legacy IF processors with band-limiting filters for the above BWs already exist, and we are building our spectrometer to these bandwidths.
I am debating between the KatADC board and the wideband ASIAA 5GSPS ADC based boards. I ran some preliminary Simulink designs with the KatADC boards, and I run into timing issues when I use ADC sampling rate > 1200 MHz. For 1.5 GSPS sampling, the FPGA clock gets up to 375 MHz with the KatADC, so perhaps this is the issue. I would like to squeeze 4 pixels into one ROACH-2 if possible. Has anyone run the KatADC close to its maximum sampling rate with the ROACH-2s? Are plan-ahead and other more advanced techniques needed for this? Alternatively, we could use the ASIAA ADC board, which has a divided-by-8 for the FPGA clock from the ADC sample rate. Keeping FPGA clock rates at nominal values might be easier with the ASIAA board, especially when we are only interested in relatively low sample clocks to 1.6 GHz. We are considering the 8-bit DMUX 1:1 version of the ASIAA board. Any pointers/advice/suggestions in choosing an appropriate ADC board is appreciated! Thanks Gopal -- Gopal Narayanan Ph #: (413) 545 0925 Department of Astronomy e-mail: [email protected] University of Massachusetts Amherst MA 01003
