hi matt, qdr has excellent bandwidth for doing random accesses, jumping around in memory (eg: it's great for re-ordering data, corner turns, bit reversing, etc).
qdr is easier to use - fixed, known latency, does reads and writes simultaneously, but it's more expensive. . if your address access is sequential, the DDR can also give you good bandwidth, but the latency and bandwidth are not predictable (it depends on how much hopping around you do, and refresh cycles....). best wishes, dan' On Thu, Aug 21, 2014 at 2:12 PM, Matt Strader <mstra...@physics.ucsb.edu> wrote: > Hi Casperites, > > We (UCSB and Fermilab) are currently designing a new DAC/ADC board (12bits > x 2.0 Gsps ADC, 14bits x 2.5 Gsps DAC) to interface with the ROACH2 for > readout of future, larger MKID instruments. The DAC/ADC board will have > it's own FPGA and it's own memory. > > We're currently deciding between adding QDRII+ SRAMs or DDR3 SDRAM chips > to the board. My very limited experience with QDR and DDR2 on > ROACH1 suggests QDR is simpler to work with (because of the constant > latency), but it would take up many more pins on the FPGA for the width of > the data they provide. Does anyone have other ideas of why to choose one > over the other? If you were to design a board from scratch, which would > you choose? > > Thanks, > Matt Strader > UCSB Physics Dept. >
