Hi Neil, A bit more information would be useful, but it sounds like if you could construct a ZDOK card that interfaced some (40, one per differential pair?) of your digitizers to a ROACH board you could use a handful of ROACH boards to perform all of the cross multiplication and accumulation and interface with CPU data recorders / post-processors.
Jack On Fri, 18 Dec 2015 at 14:26 James Smith <jsm...@ska.ac.za> wrote: > Hello Neil, > > CASPER tools could probably do what you're looking for, but I found your > description a bit confusing. You're going to need to clarify somewhat. > > Regards, > James > > > On Fri, Dec 18, 2015 at 4:15 PM, Neil Salmon <n.sal...@mmu.ac.uk> wrote: > >> Anyone help? >> >> >> >> I’m working in academia and need to build a 300-receiver channel >> single-bit digitiser / cross-correlator with a single frequency channel >> having a bandwidth of 300 MHz, centre frequency ~3 GHz. The single bit >> digitisers sample I&Q giving a total data rate of 180 Gbps and using XOR >> gates to do the cross-correlations, the total computation rate is 54 T XOR >> operations per second. I need to accumulate cross-correlations typically >> for times ranging from 10 ms to a few seconds. The system would comprise an >> array of single bit digitisers linked via a high speed data bus to FPGA >> boards for the cross-correlation/accumulation. I’ve no skills in board >> design but could probably learn VHDL. I don’t have funding to commission a >> design and build but wondered if anyone in this community could advise how >> I should go about building this system at our university. >> >> >> >> Thank you for any help you can provide. >> >> >> >> Neil >> "Before acting on this email or opening any attachments you should read >> the Manchester Metropolitan University email disclaimer available on its >> website http://www.mmu.ac.uk/emaildisclaimer " >> > >
