Dear all, I'm having a little trouble getting the 10GbE data output working correctly. I have a spectrometer design which feeds the output of (for the moment) a single vacc into the spead_pack block, which then outputs into the 10GbE block.
I can see from the mailing list that I'm not the first person to run into problems getting this working ;-) My efforts thus far have focussed on implementing various gates and counters for hardware diagnostic purposes (screenshots below). I have a script which reads counters connected to the spead_pack overflow port, and the 10GbE tx_full, tx_status, linkup, and tx_overflow ports. Using my current setup I can confirm that the tx_full and overflow ports read 0 at all times, and the status and linkup ports read 1 at all times. I have "gated" (using registers enabled using a software register) the data_in, valid, and eof input ports on the 10GbE block. My script currently configures the 10GbE core with a fabric port and IP, and dest port and IP before anything else. The tap is started immediately following this. A total of 12s sleep time has been written in before a final reset pulse is sent to the 10GbE block and finally the data_in, data_valid, and eof gates are opened. All status indicators show that the 10GbE core is not overflowing and packets should be coming out, however Wireshark shows nothing apart from basic "handshake" packets. FYI: My spead_pack block is configured for a packet length of 1024 and the eof logic is working correctly (pulses on the last valid cycle) Model screenshot: https://dl.dropboxusercontent.com/u/38103354/Capture.PNG Scope1 (spead_pack output): https://dl.dropboxusercontent.com/u/38103354/Capture2.PNG. The top panel is the data, the second panel the valid signal, the third panel the eof pulse, and the fourth panel the spead_overflow signal. Grateful for any advice/ideas/suggestions, BW Michael
