Hi Yunpeng, all, I recently wrote a memo which describes how you can use Xilinx SmartXplorer to help with timing issues. Have a look on the casper wiki in the Memos section: https://casper.berkeley.edu/wiki/images/f/f8/SmartXplorer_memo.pdf . It isn’t a free pass – you need to get fairly close using knowledge of individual hardware types on the FPGA, and you need to space out your design reasonably, by using pipelines. But it should help get over the final hurdle if you’re doing a reasonable job initially.
Best, Michael From: 门云鹏 [mailto:yp...@pku.edu.cn] Sent: 03 June 2017 16:00 To: casper@lists.berkeley.edu Subject: [casper] timing errors Dear all, I am using ROACH2 to develop digital receiving backend, but I often encounter timing errors when I run casper_xps toolflow. I wonder if there is any general solution to these timing errors. Thanks a lot, Yunpeng ----------------------------------------------------------------------------------- Yunpeng Men PhD student Department of Astronomy & Kavli Institute for Astronomy and Astrophysics, Peking University Yi He Yuan Lu 5, Hai Dian Qu, Beijing 100871, P. R. China -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu<mailto:casper@lists.berkeley.edu>" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu<mailto:casper+unsubscr...@lists.berkeley.edu>. To post to this group, send email to casper@lists.berkeley.edu<mailto:casper@lists.berkeley.edu>. -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu. To post to this group, send email to casper@lists.berkeley.edu.
