On 11/10/15 2:00 AM, GerardCJAT wrote:
Help would be nice reverse-engineering the chipset.
I also picked up some of the Russian versions of the >instruction decode chip.
Any idea how one can do it ???
The same way the other NMOS devices like the 6502 have been done. Mapping the
photos to polygons and tracing
out the layout.
My problem is I've not done it before. I also have the logic-analyzer-on-a-chip
out of the 165xx series shot but
not analyzed.
http://siliconpr0n.org/archive/doku.php?id=mcmaster:hp:hp-c5_1fi1-0001
