On 05/21/2016 07:34 PM, Toby Thain wrote: > Don't underestimate the headache of handling two zeroes.
At least on the CDC iron, it was never much of a problem. The primary way you got -0 as a result (without resorting to boolean operations), was subtracting -0 from -0. The ZR/NZ operations worked on either sign. Note that, on the fullword 60-bit operations, the conditionals were based on the contents of a single register. To compare, you had to subtract or otherwise operate on two operands and branch on the content of the result. There were no condition codes--something that made instruction scheduling much simpler. The 18-bit index register conditionals (EQ, NE, GT...etc.) didn't usually see -0 as a problem. Ones complement did have advantages in bit twiddling--there were some nifty tricks not possible in two's complement. Of course the CDC 6000 series was word-addressable--something that seemed eminently practical. As far as I'm aware, the possibility of two zeroes never impacted the performance of the CDC 6000 series in the real world. --Chuck