Hi dschuff,
[MIPS] Add support for direct-to-nacl in Clang
For Mips direct-to-nacl, the goal is to be close to le32 front-end and
use Mips32EL backend. This patch defines new NaClMips32ELTargetInfo and
modifies it slightly to be close to le32. It also adds necessary parts,
inline with ARM and X86.
REPOSITORY
rL LLVM
http://reviews.llvm.org/D10739
Files:
lib/Basic/Targets.cpp
lib/CodeGen/TargetInfo.cpp
lib/Driver/ToolChains.cpp
lib/Driver/ToolChains.h
lib/Driver/Tools.cpp
EMAIL PREFERENCES
http://reviews.llvm.org/settings/panel/emailpreferences/
Index: lib/Basic/Targets.cpp
===================================================================
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -6625,6 +6625,19 @@
NumAliases = 0;
}
+// We attempt to use PNaCl (le32) frontend and Mips32EL backend.
+class NaClMips32ELTargetInfo : public Mips32ELTargetInfo {
+public:
+ NaClMips32ELTargetInfo(const llvm::Triple &Triple) :
+ Mips32ELTargetInfo(Triple) {
+ MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 0;
+ }
+
+ BuiltinVaListKind getBuiltinVaListKind() const override {
+ return TargetInfo::PNaClABIBuiltinVaList;
+ }
+};
+
class Le64TargetInfo : public TargetInfo {
static const Builtin::Info BuiltinInfo[];
@@ -6995,7 +7008,7 @@
case llvm::Triple::NetBSD:
return new NetBSDTargetInfo<Mips32ELTargetInfo>(Triple);
case llvm::Triple::NaCl:
- return new NaClTargetInfo<Mips32ELTargetInfo>(Triple);
+ return new NaClTargetInfo<NaClMips32ELTargetInfo>(Triple);
default:
return new Mips32ELTargetInfo(Triple);
}
Index: lib/CodeGen/TargetInfo.cpp
===================================================================
--- lib/CodeGen/TargetInfo.cpp
+++ lib/CodeGen/TargetInfo.cpp
@@ -7125,6 +7125,8 @@
return *(TheTargetCodeGenInfo = new PNaClTargetCodeGenInfo(Types));
case llvm::Triple::mips:
case llvm::Triple::mipsel:
+ if (Triple.getOS() == llvm::Triple::NaCl)
+ return *(TheTargetCodeGenInfo = new PNaClTargetCodeGenInfo(Types));
return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true));
case llvm::Triple::mips64:
Index: lib/Driver/ToolChains.cpp
===================================================================
--- lib/Driver/ToolChains.cpp
+++ lib/Driver/ToolChains.cpp
@@ -2385,6 +2385,13 @@
file_paths.push_back(ToolPath + "arm-nacl");
break;
}
+ case llvm::Triple::mipsel: {
+ file_paths.push_back(FilePath + "mipsel-nacl/lib");
+ file_paths.push_back(FilePath + "mipsel-nacl/usr/lib");
+ prog_paths.push_back(ProgPath + "bin");
+ file_paths.push_back(ToolPath + "mipsel-nacl");
+ break;
+ }
default:
break;
}
@@ -2404,6 +2411,10 @@
SmallString<128> P(D.ResourceDir);
llvm::sys::path::append(P, "include");
addSystemInclude(DriverArgs, CC1Args, P.str());
+ } else if (getTriple().getArch() == llvm::Triple::mipsel) {
+ SmallString<128> P(D.Dir + "/../");
+ llvm::sys::path::append(P, "mipsel-nacl/include/c++/v1");
+ addSystemInclude(DriverArgs, CC1Args, P.str());
}
if (DriverArgs.hasArg(options::OPT_nostdlibinc))
@@ -2420,6 +2431,9 @@
case llvm::Triple::x86_64:
llvm::sys::path::append(P, "x86_64-nacl/usr/include");
break;
+ case llvm::Triple::mipsel:
+ llvm::sys::path::append(P, "mipsel-nacl/usr/include");
+ break;
default:
return;
}
Index: lib/Driver/ToolChains.h
===================================================================
--- lib/Driver/ToolChains.h
+++ lib/Driver/ToolChains.h
@@ -743,7 +743,9 @@
llvm::opt::ArgStringList &CmdArgs) const override;
bool
- IsIntegratedAssemblerDefault() const override { return false; }
+ IsIntegratedAssemblerDefault() const override {
+ return getTriple().getArch() == llvm::Triple::mipsel;
+ }
// Get the path to the file containing NaCl's ARM macros. It lives in NaCl_TC
// because the AssembleARM tool needs a const char * that it can pass around
Index: lib/Driver/Tools.cpp
===================================================================
--- lib/Driver/Tools.cpp
+++ lib/Driver/Tools.cpp
@@ -1180,6 +1180,11 @@
CmdArgs.push_back(Args.MakeArgString("-mips-ssection-threshold=" + v));
A->claim();
}
+
+ if (Triple.getOS() == llvm::Triple::NaCl) {
+ CmdArgs.push_back("-mllvm");
+ CmdArgs.push_back("-direct-to-nacl");
+ }
}
/// getPPCTargetCPU - Get the (LLVM) name of the PowerPC cpu we are targeting.
@@ -8252,6 +8257,8 @@
CmdArgs.push_back("armelf_nacl");
else if (Arch == llvm::Triple::x86_64)
CmdArgs.push_back("elf_x86_64_nacl");
+ else if (ToolChain.getArch() == llvm::Triple::mipsel)
+ CmdArgs.push_back("mipselelf_nacl");
else
D.Diag(diag::err_target_unsupported_arch) << ToolChain.getArchName()
<< "Native Client";
@@ -8315,6 +8322,13 @@
if (Args.hasArg(options::OPT_pthread) ||
Args.hasArg(options::OPT_pthreads) ||
D.CCCIsCXX()) {
+ // Gold, used by Mips, handles nested groups differently than ld, and
+ // without '-lnacl' it prefers symbols from libpthread.a over libnacl.a,
+ // which is not a desired behaviour here.
+ // See https://sourceware.org/ml/binutils/2015-03/msg00034.html
+ if (getToolChain().getArch() == llvm::Triple::mipsel)
+ CmdArgs.push_back("-lnacl");
+
CmdArgs.push_back("-lpthread");
}
@@ -8325,6 +8339,13 @@
else
CmdArgs.push_back("-lgcc_s");
CmdArgs.push_back("--no-as-needed");
+
+ // Mips needs to create and use pnacl_legacy library that contains
+ // definitions from bitcode/pnaclmm.c and definitions for
+ // __nacl_tp_tls_offset() and __nacl_tp_tdb_offset().
+ if (getToolChain().getArch() == llvm::Triple::mipsel)
+ CmdArgs.push_back("-lpnacl_legacy");
+
CmdArgs.push_back("--end-group");
}
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