Author: Mark Murray Date: 2019-12-13T17:29:59Z New Revision: a2cd4600ec6710f3218f071128e2a81edd23a2b2
URL: https://github.com/llvm/llvm-project/commit/a2cd4600ec6710f3218f071128e2a81edd23a2b2 DIFF: https://github.com/llvm/llvm-project/commit/a2cd4600ec6710f3218f071128e2a81edd23a2b2.diff LOG: [ARM][MVE][Intrinsics] All vqdmulhq/vqrdmulhq tests should be for signed numbers. Fix broken tests. I can't yet explain how they worked locally pre-commit. Added: Modified: clang/test/CodeGen/arm-mve-intrinsics/vqdmulhq.c clang/test/CodeGen/arm-mve-intrinsics/vqrdmulhq.c llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmulhq.ll llvm/test/CodeGen/Thumb2/mve-intrinsics/vqrdmulhq.ll Removed: ################################################################################ diff --git a/clang/test/CodeGen/arm-mve-intrinsics/vqdmulhq.c b/clang/test/CodeGen/arm-mve-intrinsics/vqdmulhq.c index 05e890e40078..eb7e0a0afdf3 100644 --- a/clang/test/CodeGen/arm-mve-intrinsics/vqdmulhq.c +++ b/clang/test/CodeGen/arm-mve-intrinsics/vqdmulhq.c @@ -4,17 +4,17 @@ #include <arm_mve.h> -// CHECK-LABEL: @test_vqdmulhq_u8( +// CHECK-LABEL: @test_vqdmulhq_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call <16 x i8> @llvm.arm.mve.vqdmulh.v16i8(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) // CHECK-NEXT: ret <16 x i8> [[TMP0]] // -uint8x16_t test_vqdmulhq_u8(uint8x16_t a, uint8x16_t b) +int8x16_t test_vqdmulhq_s8(int8x16_t a, int8x16_t b) { #ifdef POLYMORPHIC return vqdmulhq(a, b); #else /* POLYMORPHIC */ - return vqdmulhq_u8(a, b); + return vqdmulhq_s8(a, b); #endif /* POLYMORPHIC */ } @@ -32,17 +32,17 @@ int16x8_t test_vqdmulhq_s16(int16x8_t a, int16x8_t b) #endif /* POLYMORPHIC */ } -// CHECK-LABEL: @test_vqdmulhq_u32( +// CHECK-LABEL: @test_vqdmulhq_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vqdmulh.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) // CHECK-NEXT: ret <4 x i32> [[TMP0]] // -uint32x4_t test_vqdmulhq_u32(uint32x4_t a, uint32x4_t b) +int32x4_t test_vqdmulhq_s32(int32x4_t a, int32x4_t b) { #ifdef POLYMORPHIC return vqdmulhq(a, b); #else /* POLYMORPHIC */ - return vqdmulhq_u32(a, b); + return vqdmulhq_s32(a, b); #endif /* POLYMORPHIC */ } @@ -62,19 +62,19 @@ int8x16_t test_vqdmulhq_m_s8(int8x16_t inactive, int8x16_t a, int8x16_t b, mve_p #endif /* POLYMORPHIC */ } -// CHECK-LABEL: @test_vqdmulhq_m_u16( +// CHECK-LABEL: @test_vqdmulhq_m_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.qdmulh.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]]) // CHECK-NEXT: ret <8 x i16> [[TMP2]] // -uint16x8_t test_vqdmulhq_m_u16(uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) +int16x8_t test_vqdmulhq_m_s16(int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { #ifdef POLYMORPHIC return vqdmulhq_m(inactive, a, b, p); #else /* POLYMORPHIC */ - return vqdmulhq_m_u16(inactive, a, b, p); + return vqdmulhq_m_s16(inactive, a, b, p); #endif /* POLYMORPHIC */ } diff --git a/clang/test/CodeGen/arm-mve-intrinsics/vqrdmulhq.c b/clang/test/CodeGen/arm-mve-intrinsics/vqrdmulhq.c index 4916faead32c..27b7efd31014 100644 --- a/clang/test/CodeGen/arm-mve-intrinsics/vqrdmulhq.c +++ b/clang/test/CodeGen/arm-mve-intrinsics/vqrdmulhq.c @@ -4,17 +4,17 @@ #include <arm_mve.h> -// CHECK-LABEL: @test_vqrdmulhq_u8( +// CHECK-LABEL: @test_vqrdmulhq_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call <16 x i8> @llvm.arm.mve.vqrdmulh.v16i8(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]]) // CHECK-NEXT: ret <16 x i8> [[TMP0]] // -uint8x16_t test_vqrdmulhq_u8(uint8x16_t a, uint8x16_t b) +int8x16_t test_vqrdmulhq_s8(int8x16_t a, int8x16_t b) { #ifdef POLYMORPHIC return vqrdmulhq(a, b); #else /* POLYMORPHIC */ - return vqrdmulhq_u8(a, b); + return vqrdmulhq_s8(a, b); #endif /* POLYMORPHIC */ } @@ -32,17 +32,17 @@ int16x8_t test_vqrdmulhq_s16(int16x8_t a, int16x8_t b) #endif /* POLYMORPHIC */ } -// CHECK-LABEL: @test_vqrdmulhq_u32( +// CHECK-LABEL: @test_vqrdmulhq_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vqrdmulh.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]) // CHECK-NEXT: ret <4 x i32> [[TMP0]] // -uint32x4_t test_vqrdmulhq_u32(uint32x4_t a, uint32x4_t b) +int32x4_t test_vqrdmulhq_s32(int32x4_t a, int32x4_t b) { #ifdef POLYMORPHIC return vqrdmulhq(a, b); #else /* POLYMORPHIC */ - return vqrdmulhq_u32(a, b); + return vqrdmulhq_s32(a, b); #endif /* POLYMORPHIC */ } @@ -62,19 +62,19 @@ int8x16_t test_vqrdmulhq_m_s8(int8x16_t inactive, int8x16_t a, int8x16_t b, mve_ #endif /* POLYMORPHIC */ } -// CHECK-LABEL: @test_vqrdmulhq_m_u16( +// CHECK-LABEL: @test_vqrdmulhq_m_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[P:%.*]] to i32 // CHECK-NEXT: [[TMP1:%.*]] = call <8 x i1> @llvm.arm.mve.pred.i2v.v8i1(i32 [[TMP0]]) // CHECK-NEXT: [[TMP2:%.*]] = call <8 x i16> @llvm.arm.mve.qrdmulh.predicated.v8i16.v8i1(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i1> [[TMP1]], <8 x i16> [[INACTIVE:%.*]]) // CHECK-NEXT: ret <8 x i16> [[TMP2]] // -uint16x8_t test_vqrdmulhq_m_u16(uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) +int16x8_t test_vqrdmulhq_m_s16(int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p) { #ifdef POLYMORPHIC return vqrdmulhq_m(inactive, a, b, p); #else /* POLYMORPHIC */ - return vqrdmulhq_m_u16(inactive, a, b, p); + return vqrdmulhq_m_s16(inactive, a, b, p); #endif /* POLYMORPHIC */ } diff --git a/llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmulhq.ll b/llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmulhq.ll index 70178b63d578..58e54a9d268e 100644 --- a/llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmulhq.ll +++ b/llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmulhq.ll @@ -1,8 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp -verify-machineinstrs -o - %s | FileCheck %s -define arm_aapcs_vfpcc <16 x i8> @test_vqdmulhq_u8(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { -; CHECK-LABEL: test_vqdmulhq_u8: +define arm_aapcs_vfpcc <16 x i8> @test_vqdmulhq_s8(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { +; CHECK-LABEL: test_vqdmulhq_s8: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: vqdmulh.s8 q0, q0, q1 ; CHECK-NEXT: bx lr @@ -25,8 +25,8 @@ entry: declare <8 x i16> @llvm.arm.mve.vqdmulh.v8i16(<8 x i16>, <8 x i16>) #1 -define arm_aapcs_vfpcc <4 x i32> @test_vqdmulhq_u32(<4 x i32> %a, <4 x i32> %b) local_unnamed_addr #0 { -; CHECK-LABEL: test_vqdmulhq_u32: +define arm_aapcs_vfpcc <4 x i32> @test_vqdmulhq_s32(<4 x i32> %a, <4 x i32> %b) local_unnamed_addr #0 { +; CHECK-LABEL: test_vqdmulhq_s32: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: vqdmulh.s32 q0, q0, q1 ; CHECK-NEXT: bx lr @@ -55,8 +55,8 @@ declare <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32) #1 declare <16 x i8> @llvm.arm.mve.qdmulh.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, <16 x i1>, <16 x i8>) #1 -define arm_aapcs_vfpcc <8 x i16> @test_vqdmulhq_m_u16(<8 x i16> %inactive, <8 x i16> %a, <8 x i16> %b, i16 zeroext %p) local_unnamed_addr #0 { -; CHECK-LABEL: test_vqdmulhq_m_u16: +define arm_aapcs_vfpcc <8 x i16> @test_vqdmulhq_m_s16(<8 x i16> %inactive, <8 x i16> %a, <8 x i16> %b, i16 zeroext %p) local_unnamed_addr #0 { +; CHECK-LABEL: test_vqdmulhq_m_s16: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: vmsr p0, r0 ; CHECK-NEXT: vpst diff --git a/llvm/test/CodeGen/Thumb2/mve-intrinsics/vqrdmulhq.ll b/llvm/test/CodeGen/Thumb2/mve-intrinsics/vqrdmulhq.ll index 69decf6719a7..806fb7bc930b 100644 --- a/llvm/test/CodeGen/Thumb2/mve-intrinsics/vqrdmulhq.ll +++ b/llvm/test/CodeGen/Thumb2/mve-intrinsics/vqrdmulhq.ll @@ -1,8 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp -verify-machineinstrs -o - %s | FileCheck %s -define arm_aapcs_vfpcc <16 x i8> @test_vqrdmulhq_u8(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { -; CHECK-LABEL: test_vqrdmulhq_u8: +define arm_aapcs_vfpcc <16 x i8> @test_vqrdmulhq_s8(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 { +; CHECK-LABEL: test_vqrdmulhq_s8: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: vqrdmulh.s8 q0, q0, q1 ; CHECK-NEXT: bx lr @@ -25,8 +25,8 @@ entry: declare <8 x i16> @llvm.arm.mve.vqrdmulh.v8i16(<8 x i16>, <8 x i16>) #1 -define arm_aapcs_vfpcc <4 x i32> @test_vqrdmulhq_u32(<4 x i32> %a, <4 x i32> %b) local_unnamed_addr #0 { -; CHECK-LABEL: test_vqrdmulhq_u32: +define arm_aapcs_vfpcc <4 x i32> @test_vqrdmulhq_s32(<4 x i32> %a, <4 x i32> %b) local_unnamed_addr #0 { +; CHECK-LABEL: test_vqrdmulhq_s32: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: vqrdmulh.s32 q0, q0, q1 ; CHECK-NEXT: bx lr @@ -55,8 +55,8 @@ declare <16 x i1> @llvm.arm.mve.pred.i2v.v16i1(i32) #1 declare <16 x i8> @llvm.arm.mve.qrdmulh.predicated.v16i8.v16i1(<16 x i8>, <16 x i8>, <16 x i1>, <16 x i8>) #1 -define arm_aapcs_vfpcc <8 x i16> @test_vqrdmulhq_m_u16(<8 x i16> %inactive, <8 x i16> %a, <8 x i16> %b, i16 zeroext %p) local_unnamed_addr #0 { -; CHECK-LABEL: test_vqrdmulhq_m_u16: +define arm_aapcs_vfpcc <8 x i16> @test_vqrdmulhq_m_s16(<8 x i16> %inactive, <8 x i16> %a, <8 x i16> %b, i16 zeroext %p) local_unnamed_addr #0 { +; CHECK-LABEL: test_vqrdmulhq_m_s16: ; CHECK: @ %bb.0: @ %entry ; CHECK-NEXT: vmsr p0, r0 ; CHECK-NEXT: vpst _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits