efriedma added inline comments.

================
Comment at: llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp:5806
+    if (Opc == ARM::BL || Opc == ARM::tBL || Opc == ARM::BLX ||
+        Opc == ARM::tBLXr || Opc == ARM::tBLXi)
+      UnknownCallOutlineType = outliner::InstrType::LegalTerminator;
----------------
efriedma wrote:
> Maybe also look for TAILJMP opcodes?
Oh, nevermind, TAILJMP is a terminator so it gets handled earlier.


================
Comment at: llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp:5817
+  // Be conservative with program counter.
+  if (MI.readsRegister(ARM::PC, TRI) || MI.modifiesRegister(ARM::PC, TRI))
+    return outliner::InstrType::Illegal;
----------------
efriedma wrote:
> samparker wrote:
> > Cheers. AArch64 is nice and doesn't allow arbitrary writes to the PC, but 
> > we won't have that luxury here.
> You might also want to support POP_RET.
Oh, nevermind, POP_RET is a terminator so it gets handled earlier.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76066/new/

https://reviews.llvm.org/D76066



_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

Reply via email to