craig.topper added a comment. In D80251#2046564 <https://reviews.llvm.org/D80251#2046564>, @spatel wrote:
> Is it possible to fix those other 5 in the Intel docs for consistency, or is > there some functional reason that those are different? I think it was just a mistake. The docs are derived from icc's source code which also has them wrong. Note all of the SSE/AVX2 shift intrinsics use int not unsigned int. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80251/new/ https://reviews.llvm.org/D80251 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
