stuij created this revision.
Herald added subscribers: cfe-commits, danielkiss, kristof.beyls.
Herald added a project: clang.
stuij added a child revision: D81373: [WIP] Basic bfloat support on Arm.
As part of moving the argument lowering handling for bfloat arguments and
returns to the backend, this patch removes the code that was responsible for
handling the coercion of those arguments in Clang's Codegen.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D81837
Files:
clang/lib/CodeGen/ABIInfo.h
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/CodeGen/TargetInfo.cpp
clang/test/CodeGen/arm-bf16-getset-intrinsics.c
clang/test/CodeGen/arm-bf16-params-returns.c
clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c
Index: clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c
===================================================================
--- clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c
+++ clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c
@@ -1,7 +1,7 @@
// RUN: %clang_cc1 -triple armv8.2a-arm-none-eabi -target-feature +neon -target-feature +bf16 -mfloat-abi hard \
-// RUN: -disable-O0-optnone -S -emit-llvm -o - %s \
-// RUN: | opt -S -instcombine \
-// RUN: | FileCheck %s
+// RUN: -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -instcombine | FileCheck %s
+// RUN: %clang_cc1 -triple armv8.2a-arm-none-eabi -target-feature +neon -target-feature +bf16 -mfloat-abi softfp \
+// RUN: -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -instcombine | FileCheck %s
// REQUIRES: arm-registered-target
Index: clang/test/CodeGen/arm-bf16-params-returns.c
===================================================================
--- clang/test/CodeGen/arm-bf16-params-returns.c
+++ clang/test/CodeGen/arm-bf16-params-returns.c
@@ -1,7 +1,7 @@
-// RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK32-HARD
-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK64-HARD
-// RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK32-SOFTFP
-// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s --check-prefix=CHECK64-SOFTFP
+// RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-abi aapcs -mfloat-abi hard -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s
+// RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-abi aapcs -mfloat-abi softfp -target-feature +bf16 -target-feature +neon -emit-llvm -O2 -o - %s | opt -S -mem2reg -sroa | FileCheck %s
#include <arm_neon.h>
@@ -9,24 +9,11 @@
__bf16 test_ret_bf16(__bf16 v) {
return v;
}
-// CHECK32-HARD: define arm_aapcs_vfpcc bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
-// CHECK32-HARD: ret bfloat %v
-// CHECK64-HARD: define bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
-// CHECK64-HARD: ret bfloat %v
-// CHECK32-SOFTFP: define i32 @test_ret_bf16(i32 [[V0:.*]]) {{.*}} {
-// CHECK32-SOFTFP: %tmp2.0.insert.ext = and i32 [[V0]], 65535
-// CHECK32-SOFTFP: ret i32 %tmp2.0.insert.ext
-// CHECK64-SOFTFP: define bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
-// CHECK64-SOFTFP: ret bfloat %v
+// CHECK: define {{.*}}bfloat @test_ret_bf16(bfloat returned %v) {{.*}} {
+// CHECK: ret bfloat %v
bfloat16x4_t test_ret_bf16x4_t(bfloat16x4_t v) {
return v;
}
-// CHECK32-HARD: define arm_aapcs_vfpcc <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} {
-// CHECK32-HARD: ret <4 x bfloat> %v
-// CHECK64-HARD: define <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} {
-// CHECK64-HARD: ret <4 x bfloat> %v
-// CHECK32-SOFTFP: define <2 x i32> @test_ret_bf16x4_t(<2 x i32> [[V0:.*]]) {{.*}} {
-// CHECK32-SOFTFP: ret <2 x i32> %v
-// CHECK64-SOFTFP: define <4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} {
-// CHECK64-SOFTFP: ret <4 x bfloat> %v
+// CHECK: define {{.*}}<4 x bfloat> @test_ret_bf16x4_t(<4 x bfloat> returned %v) {{.*}} {
+// CHECK: ret <4 x bfloat> %v
Index: clang/test/CodeGen/arm-bf16-getset-intrinsics.c
===================================================================
--- clang/test/CodeGen/arm-bf16-getset-intrinsics.c
+++ clang/test/CodeGen/arm-bf16-getset-intrinsics.c
@@ -1,6 +1,8 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
// RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-feature +neon -target-feature +bf16 -mfloat-abi hard \
// RUN: -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg -instcombine | FileCheck %s
+// RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-feature +neon -target-feature +bf16 -mfloat-abi softfp \
+// RUN: -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg -instcombine | FileCheck %s
#include <arm_neon.h>
Index: clang/lib/CodeGen/TargetInfo.cpp
===================================================================
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -5376,9 +5376,6 @@
bool isLegalVectorTypeForSwift(CharUnits totalSize, llvm::Type *eltTy,
unsigned elts) const override;
- bool allowBFloatArgsAndRet() const override {
- return getTarget().hasBFloat16Type();
- }
};
class AArch64TargetCodeGenInfo : public TargetCodeGenInfo {
@@ -6022,10 +6019,6 @@
ABIKind getABIKind() const { return Kind; }
- bool allowBFloatArgsAndRet() const override {
- return !IsFloatABISoftFP && getTarget().hasBFloat16Type();
- }
-
private:
ABIArgInfo classifyReturnType(QualType RetTy, bool isVariadic,
unsigned functionCallConv) const;
@@ -6276,13 +6269,6 @@
return ABIArgInfo::getDirect(ResType);
}
- // __bf16 gets passed using the bfloat IR type, or using i32 but
- // with the top 16 bits unspecified.
- if (Ty->isBFloat16Type() && IsFloatABISoftFP) {
- llvm::Type *ResType = llvm::Type::getInt32Ty(getVMContext());
- return ABIArgInfo::getDirect(ResType);
- }
-
if (!isAggregateTypeForABI(Ty)) {
// Treat an enum type as its underlying type.
if (const EnumType *EnumTy = Ty->getAs<EnumType>()) {
@@ -6478,11 +6464,9 @@
return getNaturalAlignIndirect(RetTy);
// TODO: FP16/BF16 vectors should be converted to integer vectors
// This check is similar to isIllegalVectorType - refactor?
- if ((!getTarget().hasLegalHalfType() &&
+ if (!getTarget().hasLegalHalfType() &&
(VT->getElementType()->isFloat16Type() ||
- VT->getElementType()->isHalfType())) ||
- (IsFloatABISoftFP &&
- VT->getElementType()->isBFloat16Type()))
+ VT->getElementType()->isHalfType()))
return coerceIllegalVector(RetTy);
}
@@ -6497,15 +6481,6 @@
return ABIArgInfo::getDirect(ResType);
}
- // if we're using the softfp float abi, __bf16 get returned as if it were an
- // int but with the top 16 bits unspecified.
- if (RetTy->isBFloat16Type()) {
- llvm::Type *ResType = IsAAPCS_VFP ?
- llvm::Type::getBFloatTy(getVMContext()) :
- llvm::Type::getInt32Ty(getVMContext());
- return ABIArgInfo::getDirect(ResType);
- }
-
if (!isAggregateTypeForABI(RetTy)) {
// Treat an enum type as its underlying type.
if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
@@ -6592,17 +6567,13 @@
/// isIllegalVector - check whether Ty is an illegal vector type.
bool ARMABIInfo::isIllegalVectorType(QualType Ty) const {
if (const VectorType *VT = Ty->getAs<VectorType> ()) {
- // On targets that don't support half, fp16 or bfloat, they are expanded
+ // On targets that don't support half or fp16, they are expanded
// into float, and we don't want the ABI to depend on whether or not they
// are supported in hardware. Thus return false to coerce vectors of these
// types into integer vectors.
- // We do not depend on hasLegalHalfType for bfloat as it is a
- // separate IR type.
- if ((!getTarget().hasLegalHalfType() &&
+ if (!getTarget().hasLegalHalfType() &&
(VT->getElementType()->isFloat16Type() ||
- VT->getElementType()->isHalfType())) ||
- (IsFloatABISoftFP &&
- VT->getElementType()->isBFloat16Type()))
+ VT->getElementType()->isHalfType()))
return true;
if (isAndroid()) {
// Android shipped using Clang 3.1, which supported a slightly different
Index: clang/lib/CodeGen/CGBuiltin.cpp
===================================================================
--- clang/lib/CodeGen/CGBuiltin.cpp
+++ clang/lib/CodeGen/CGBuiltin.cpp
@@ -4493,8 +4493,7 @@
static llvm::VectorType *GetNeonType(CodeGenFunction *CGF,
NeonTypeFlags TypeFlags,
bool HasLegalHalfType = true,
- bool V1Ty = false,
- bool AllowBFloatArgsAndRet = true) {
+ bool V1Ty = false) {
int IsQuad = TypeFlags.isQuad();
switch (TypeFlags.getEltType()) {
case NeonTypeFlags::Int8:
@@ -4504,10 +4503,7 @@
case NeonTypeFlags::Poly16:
return llvm::FixedVectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad));
case NeonTypeFlags::BFloat16:
- if (AllowBFloatArgsAndRet)
- return llvm::FixedVectorType::get(CGF->BFloatTy, V1Ty ? 1 : (4 << IsQuad));
- else
- return llvm::FixedVectorType::get(CGF->Int16Ty, V1Ty ? 1 : (4 << IsQuad));
+ return llvm::FixedVectorType::get(CGF->BFloatTy, V1Ty ? 1 : (4 << IsQuad));
case NeonTypeFlags::Float16:
if (HasLegalHalfType)
return llvm::FixedVectorType::get(CGF->HalfTy, V1Ty ? 1 : (4 << IsQuad));
@@ -5523,11 +5519,8 @@
bool Usgn = Type.isUnsigned();
bool Quad = Type.isQuad();
const bool HasLegalHalfType = getTarget().hasLegalHalfType();
- const bool AllowBFloatArgsAndRet =
- getTargetHooks().getABIInfo().allowBFloatArgsAndRet();
- llvm::VectorType *VTy = GetNeonType(this, Type, HasLegalHalfType, false,
- AllowBFloatArgsAndRet);
+ llvm::VectorType *VTy = GetNeonType(this, Type, HasLegalHalfType, false);
llvm::Type *Ty = VTy;
if (!Ty)
return nullptr;
@@ -6997,8 +6990,7 @@
llvm::VectorType *VTy = GetNeonType(this, Type,
getTarget().hasLegalHalfType(),
- false,
- getTarget().hasBFloat16Type());
+ false);
llvm::Type *Ty = VTy;
if (!Ty)
return nullptr;
Index: clang/lib/CodeGen/ABIInfo.h
===================================================================
--- clang/lib/CodeGen/ABIInfo.h
+++ clang/lib/CodeGen/ABIInfo.h
@@ -60,8 +60,6 @@
virtual bool supportsSwift() const { return false; }
- virtual bool allowBFloatArgsAndRet() const { return false; }
-
CodeGen::CGCXXABI &getCXXABI() const;
ASTContext &getContext() const;
llvm::LLVMContext &getVMContext() const;
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