dmgreen added a comment.
I would expect this to be very similar to
https://reviews.llvm.org/rG8bf99f1e6f0f9b426d6060361ea6d9d47c1868d1, but some
parts seems to be missing. Can you make sure that everything is included and in
a sensible order.
================
Comment at: llvm/include/llvm/Support/AArch64TargetParser.def:131
+AARCH64_CPU_NAME("cortex-a78", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
+ (AArch64::AEK_RAS | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC
| AArch64::AEK_SSBS))
+AARCH64_CPU_NAME("cortex-x1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
----------------
This no longer has FP16?
AEK_RAS I believe should be included in ARMV8_2A,
================
Comment at: llvm/include/llvm/Support/ARMTargetParser.def:301
+ (ARM::AEK_RAS | ARM::AEK_DOTPROD))
+ARM_CPU_NAME("cortex-a78",ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
+ (ARM::AEK_RAS | ARM::AEK_DOTPROD))
----------------
All these can go in a better order, please. A78 can go next to A77. Same
everywhere else.
================
Comment at: llvm/lib/Target/AArch64/AArch64Subtarget.cpp:196
+ case CortexX1:
+ case CortexA78:
+ PrefFunctionLogAlignment = 4;
----------------
These can go with the other CortexAXX cpu's, which seem to set the same
PrefFunctionLogAlignment. Same for the ARM equivalent.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D83206/new/
https://reviews.llvm.org/D83206
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