saiislam updated this revision to Diff 278787. saiislam added a comment. Removed getNVPTXWarpSize() changes for a separate patch and rebased.
Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83492/new/ https://reviews.llvm.org/D83492 Files: clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp Index: clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp =================================================================== --- clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp +++ clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp @@ -20,6 +20,7 @@ #include "clang/AST/StmtVisitor.h" #include "clang/Basic/Cuda.h" #include "llvm/ADT/SmallPtrSet.h" +#include "llvm/Frontend/OpenMP/OMPGridValues.h" #include "llvm/IR/IntrinsicsNVPTX.h" using namespace clang; @@ -195,11 +196,9 @@ /// code. For all practical purposes this is fine because the configuration /// is the same for all known NVPTX architectures. enum MachineConfiguration : unsigned { - WarpSize = 32, - /// Number of bits required to represent a lane identifier, which is - /// computed as log_2(WarpSize). - LaneIDBits = 5, - LaneIDMask = WarpSize - 1, + /// See "llvm/Frontend/OpenMP/OMPGridValues.h" for various related target + /// specific Grid Values like GV_Warp_Size, GV_Warp_Size_Log2, + /// and GV_Warp_Size_Log2_Mask. /// Global memory alignment for performance. GlobalMemoryAlignment = 128, @@ -431,6 +430,7 @@ assert(!GlobalizedRD && "Record for globalized variables is built already."); ArrayRef<const ValueDecl *> EscapedDeclsForParallel, EscapedDeclsForTeams; + unsigned WarpSize = CGF.getTarget().getGridValue(llvm::omp::GV_Warp_Size); if (IsInTTDRegion) EscapedDeclsForTeams = EscapedDecls.getArrayRef(); else @@ -634,6 +634,8 @@ /// on the NVPTX device, to generate more efficient code. static llvm::Value *getNVPTXWarpID(CodeGenFunction &CGF) { CGBuilderTy &Bld = CGF.Builder; + unsigned LaneIDBits = + CGF.getTarget().getGridValue(llvm::omp::GV_Warp_Size_Log2); return Bld.CreateAShr(getNVPTXThreadID(CGF), LaneIDBits, "nvptx_warp_id"); } @@ -642,6 +644,8 @@ /// on the NVPTX device, to generate more efficient code. static llvm::Value *getNVPTXLaneID(CodeGenFunction &CGF) { CGBuilderTy &Bld = CGF.Builder; + unsigned LaneIDMask = CGF.getContext().getTargetInfo().getGridValue( + llvm::omp::GV_Warp_Size_Log2_Mask); return Bld.CreateAnd(getNVPTXThreadID(CGF), Bld.getInt32(LaneIDMask), "nvptx_lane_id"); }
Index: clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp =================================================================== --- clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp +++ clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp @@ -20,6 +20,7 @@ #include "clang/AST/StmtVisitor.h" #include "clang/Basic/Cuda.h" #include "llvm/ADT/SmallPtrSet.h" +#include "llvm/Frontend/OpenMP/OMPGridValues.h" #include "llvm/IR/IntrinsicsNVPTX.h" using namespace clang; @@ -195,11 +196,9 @@ /// code. For all practical purposes this is fine because the configuration /// is the same for all known NVPTX architectures. enum MachineConfiguration : unsigned { - WarpSize = 32, - /// Number of bits required to represent a lane identifier, which is - /// computed as log_2(WarpSize). - LaneIDBits = 5, - LaneIDMask = WarpSize - 1, + /// See "llvm/Frontend/OpenMP/OMPGridValues.h" for various related target + /// specific Grid Values like GV_Warp_Size, GV_Warp_Size_Log2, + /// and GV_Warp_Size_Log2_Mask. /// Global memory alignment for performance. GlobalMemoryAlignment = 128, @@ -431,6 +430,7 @@ assert(!GlobalizedRD && "Record for globalized variables is built already."); ArrayRef<const ValueDecl *> EscapedDeclsForParallel, EscapedDeclsForTeams; + unsigned WarpSize = CGF.getTarget().getGridValue(llvm::omp::GV_Warp_Size); if (IsInTTDRegion) EscapedDeclsForTeams = EscapedDecls.getArrayRef(); else @@ -634,6 +634,8 @@ /// on the NVPTX device, to generate more efficient code. static llvm::Value *getNVPTXWarpID(CodeGenFunction &CGF) { CGBuilderTy &Bld = CGF.Builder; + unsigned LaneIDBits = + CGF.getTarget().getGridValue(llvm::omp::GV_Warp_Size_Log2); return Bld.CreateAShr(getNVPTXThreadID(CGF), LaneIDBits, "nvptx_warp_id"); } @@ -642,6 +644,8 @@ /// on the NVPTX device, to generate more efficient code. static llvm::Value *getNVPTXLaneID(CodeGenFunction &CGF) { CGBuilderTy &Bld = CGF.Builder; + unsigned LaneIDMask = CGF.getContext().getTargetInfo().getGridValue( + llvm::omp::GV_Warp_Size_Log2_Mask); return Bld.CreateAnd(getNVPTXThreadID(CGF), Bld.getInt32(LaneIDMask), "nvptx_lane_id"); }
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