aheejin added inline comments.
================ Comment at: llvm/test/CodeGen/WebAssembly/simd-widening.ll:113 + +;; Also test that similar patterns are still expanded correctly + ---------------- tlively wrote: > aheejin wrote: > > tlively wrote: > > > aheejin wrote: > > > > It'd be clearer to say starting indices of these don't start with 0 or > > > > [lanecount - 1] so they can't be widened using `widen_low` or > > > > `widen_high` instructions. > > > > > > > > Question: Can we also widen these using shifts? > > > Sure, since I didn't end up testing more patterns, I can make the comment > > > more specific. > > > > > > Regarding shifts, I don't think it's possible to do widening with shifts > > > because widening has to fundamentally change the number of lanes, which > > > shifts can't do. > > What I meant was, in case of i16x8->i32x4, the current code can widen i16x8 > > input vector with elements in the indices 0 to 4. If those elements are > > instead in 1 to 5, can we first shift that to 0~4 and widen it? > Oh gotcha. No, unfortunately I don't think that would work. The SIMD shift > instructions shift bytes within lanes but they can't shift data into a > different lane. Even if we used shifts on larger lanes to try to overcome > that limitation, a 64x2 shift would still not be able to shift data from the > high half of the vector to the low half or vice versa, which we would need to > do to implement your suggestion. Ah right... I was confused about SIMD shifts. Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D84556/new/ https://reviews.llvm.org/D84556 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits