yonghong-song marked an inline comment as done.
yonghong-song added inline comments.
================
Comment at: llvm/lib/Target/BPF/BPFInstrInfo.td:830
+
+ let Predicates = [BPFHasAtomicExt] in {
+ def CMPXCHGD : CMPXCHG<BPF_DW, "64", atomic_cmp_swap_64>;
----------------
ast wrote:
> let Defs = [R0], Uses = [R0]
> and BPFISelLowering would need to do getCopyToReg+cmpxchg+getCopyFromReg
> similar to X86ISelLowering ?
Yes, Just with Uses = [R0] or Uses = [W0] and change patterns can make it work.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D72184/new/
https://reviews.llvm.org/D72184
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