StephenFan added inline comments.
================ Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZfinx.td:102 + : InstAlias<OpcodeStr#" $rd, $rs1, $rs2, $rs3", + (Inst GPR:$rd, GPR:$rs1, GPR:$rs2, GPR:$rs3, 0b111)>; + ---------------- use GPR as instruction operand may cause the codegen part of zfinx report errors. Because the GPR has data type i32 or i64, However, the zfinx will deal with the data type f64 or f32. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D93298/new/ https://reviews.llvm.org/D93298 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
