Author: mzuckerm Date: Tue May 3 07:45:04 2016 New Revision: 268376 URL: http://llvm.org/viewvc/llvm-project?rev=268376&view=rev Log: [Clang][AVX512][Builtin] Adding intrinsics for vcvt{ph|ps}2{ps|ph} instruction set
Differential Revision: http://reviews.llvm.org/D19767 Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/lib/Headers/avx512vlintrin.h cfe/trunk/test/CodeGen/avx512vl-builtins.c Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=268376&r1=268375&r2=268376&view=diff ============================================================================== --- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Tue May 3 07:45:04 2016 @@ -2252,6 +2252,10 @@ TARGET_BUILTIN(__builtin_ia32_compressst TARGET_BUILTIN(__builtin_ia32_compressstoredi512_mask, "vV8LLi*V8LLiUc","","avx512f") TARGET_BUILTIN(__builtin_ia32_compressstoresf512_mask, "vV16f*V16fUs","","avx512f") TARGET_BUILTIN(__builtin_ia32_compressstoresi512_mask, "vV16i*V16iUs","","avx512f") +TARGET_BUILTIN(__builtin_ia32_vcvtph2ps_mask, "V4fV8sV4fUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtph2ps256_mask, "V8fV8sV8fUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtps2ph_mask, "V8sV4fIiV8sUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_vcvtps2ph256_mask, "V8sV8fIiV8sUc","","avx512vl") #undef BUILTIN #undef TARGET_BUILTIN Modified: cfe/trunk/lib/Headers/avx512vlintrin.h URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512vlintrin.h?rev=268376&r1=268375&r2=268376&view=diff ============================================================================== --- cfe/trunk/lib/Headers/avx512vlintrin.h (original) +++ cfe/trunk/lib/Headers/avx512vlintrin.h Tue May 3 07:45:04 2016 @@ -9453,6 +9453,65 @@ _mm256_maskz_mov_ps (__mmask8 __U, __m25 (__mmask8) __U); } +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_mask_cvtph_ps (__m128 __W, __mmask8 __U, __m128i __A) +{ + return (__m128) __builtin_ia32_vcvtph2ps_mask ((__v8hi) __A, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_maskz_cvtph_ps (__mmask8 __U, __m128i __A) +{ + return (__m128) __builtin_ia32_vcvtph2ps_mask ((__v8hi) __A, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS +_mm256_mask_cvtph_ps (__m256 __W, __mmask8 __U, __m128i __A) +{ + return (__m256) __builtin_ia32_vcvtph2ps256_mask ((__v8hi) __A, + (__v8sf) __W, + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS +_mm256_maskz_cvtph_ps (__mmask8 __U, __m128i __A) +{ + return (__m256) __builtin_ia32_vcvtph2ps256_mask ((__v8hi) __A, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) __U); +} + +#define _mm_mask_cvtps_ph( __W, __U, __A, __I) __extension__ ({ \ +__builtin_ia32_vcvtps2ph_mask ((__v4sf)( __A),( __I),\ + (__v8hi)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm_maskz_cvtps_ph( __U, __A, __I) __extension__ ({ \ +__builtin_ia32_vcvtps2ph_mask ((__v4sf)( __A),( __I),\ + (__v8hi)\ + _mm_setzero_si128 (),\ + (__mmask8)( __U));\ +}) + +#define _mm256_mask_cvtps_ph( __W, __U, __A, __I) __extension__ ({ \ +__builtin_ia32_vcvtps2ph256_mask ((__v8sf)( __A),( __I),\ + (__v8hi)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm256_maskz_cvtps_ph( __U, __A, __I) __extension__ ({ \ +__builtin_ia32_vcvtps2ph256_mask ((__v8sf)( __A),( __I),\ + (__v8hi)\ + _mm_setzero_si128 (),\ + (__mmask8)( __U));\ +}) #undef __DEFAULT_FN_ATTRS #undef __DEFAULT_FN_ATTRS_BOTH Modified: cfe/trunk/test/CodeGen/avx512vl-builtins.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vl-builtins.c?rev=268376&r1=268375&r2=268376&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/avx512vl-builtins.c (original) +++ cfe/trunk/test/CodeGen/avx512vl-builtins.c Tue May 3 07:45:04 2016 @@ -6654,3 +6654,51 @@ __m256 test_mm256_maskz_mov_ps(__mmask8 return _mm256_maskz_mov_ps(__U, __A); } +__m128 test_mm_mask_cvtph_ps(__m128 __W, __mmask8 __U, __m128i __A) { + // CHECK-LABEL: @test_mm_mask_cvtph_ps + // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.128 + return _mm_mask_cvtph_ps(__W, __U, __A); +} + +__m128 test_mm_maskz_cvtph_ps(__mmask8 __U, __m128i __A) { + // CHECK-LABEL: @test_mm_maskz_cvtph_ps + // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.128 + return _mm_maskz_cvtph_ps(__U, __A); +} + +__m256 test_mm256_mask_cvtph_ps(__m256 __W, __mmask8 __U, __m128i __A) { + // CHECK-LABEL: @test_mm256_mask_cvtph_ps + // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.256 + return _mm256_mask_cvtph_ps(__W, __U, __A); +} + +__m256 test_mm256_maskz_cvtph_ps(__mmask8 __U, __m128i __A) { + // CHECK-LABEL: @test_mm256_maskz_cvtph_ps + // CHECK: @llvm.x86.avx512.mask.vcvtph2ps.256 + return _mm256_maskz_cvtph_ps(__U, __A); +} + +__m128i test_mm_mask_cvtps_ph(__m128i __W, __mmask8 __U, __m128 __A) { + // CHECK-LABEL: @test_mm_mask_cvtps_ph + // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.128 + return _mm_mask_cvtps_ph(__W, __U, __A, _MM_FROUND_CUR_DIRECTION); +} + +__m128i test_mm_maskz_cvtps_ph(__mmask8 __U, __m128 __A) { + // CHECK-LABEL: @test_mm_maskz_cvtps_ph + // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.128 + return _mm_maskz_cvtps_ph(__U, __A, _MM_FROUND_CUR_DIRECTION); +} + +__m128i test_mm256_mask_cvtps_ph(__m128i __W, __mmask8 __U, __m256 __A) { + // CHECK-LABEL: @test_mm256_mask_cvtps_ph + // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.256 + return _mm256_mask_cvtps_ph(__W, __U, __A, _MM_FROUND_CUR_DIRECTION); +} + +__m128i test_mm256_maskz_cvtps_ph(__mmask8 __U, __m256 __A) { + // CHECK-LABEL: @test_mm256_maskz_cvtps_ph + // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.256 + return _mm256_maskz_cvtps_ph(__U, __A, _MM_FROUND_CUR_DIRECTION); +} + _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits