craig.topper created this revision. craig.topper added reviewers: asb, frasercrmck, luismarques, jrtc27, evandro, HsiangKai, khchen, arcbbb. Herald added subscribers: StephenFan, vkmr, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar. craig.topper requested review of this revision. Herald added a subscriber: MaskRay. Herald added a project: clang.
The backend can't handle this and will throw a fatal error from type legalization. It's easy enough to fix that for this intrinsic by just splitting the IR intrinsic since it works on individual bytes. There will be other intrinsics in the future that would be harder to support through splitting, for example grev, gorc, and shfl. Those would require a compare and a select be inserted to check the MSB of their control input. This patch adds support for preventing this in the frontend with a nice diagnostic. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D99984 Files: clang/include/clang/Basic/BuiltinsRISCV.def clang/lib/Basic/Targets/RISCV.cpp clang/lib/Basic/Targets/RISCV.h clang/lib/Sema/SemaChecking.cpp clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c Index: clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c =================================================================== --- /dev/null +++ clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c @@ -0,0 +1,6 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py +// RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-zbb -verify %s -o - + +int orc_b_64(int a) { + return __builtin_riscv_orc_b_64(a); // expected-error {{builtin requires 'RV64' extension support to be enabled}} +} Index: clang/lib/Sema/SemaChecking.cpp =================================================================== --- clang/lib/Sema/SemaChecking.cpp +++ clang/lib/Sema/SemaChecking.cpp @@ -3422,12 +3422,18 @@ Features.split(ReqFeatures, ','); // Check if each required feature is included - for (auto &I : ReqFeatures) { - if (TI.hasFeature(I)) + for (StringRef F : ReqFeatures) { + if (TI.hasFeature(F)) continue; + + // If the feature is 64bit, alter the string so it will print better in + // the diagnostic. + if (F == "64bit") + F = "RV64"; + // Convert features like "zbr" and "experimental-zbr" to "Zbr". - I.consume_front("experimental-"); - std::string FeatureStr = I.str(); + F.consume_front("experimental-"); + std::string FeatureStr = F.str(); FeatureStr[0] = std::toupper(FeatureStr[0]); // Error message Index: clang/lib/Basic/Targets/RISCV.h =================================================================== --- clang/lib/Basic/Targets/RISCV.h +++ clang/lib/Basic/Targets/RISCV.h @@ -99,6 +99,11 @@ std::string convertConstraint(const char *&Constraint) const override; + bool + initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, + StringRef CPU, + const std::vector<std::string> &FeaturesVec) const override; + bool hasFeature(StringRef Feature) const override; bool handleTargetFeatures(std::vector<std::string> &Features, Index: clang/lib/Basic/Targets/RISCV.cpp =================================================================== --- clang/lib/Basic/Targets/RISCV.cpp +++ clang/lib/Basic/Targets/RISCV.cpp @@ -239,6 +239,16 @@ Builtin::FirstTSBuiltin); } +bool RISCVTargetInfo::initFeatureMap( + llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU, + const std::vector<std::string> &FeaturesVec) const { + + if (getTriple().getArch() == llvm::Triple::riscv64) + Features["64bit"] = true; + + return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec); +} + /// Return true if has this feature, need to sync with handleTargetFeatures. bool RISCVTargetInfo::hasFeature(StringRef Feature) const { bool Is64Bit = getTriple().getArch() == llvm::Triple::riscv64; @@ -246,6 +256,7 @@ .Case("riscv", true) .Case("riscv32", !Is64Bit) .Case("riscv64", Is64Bit) + .Case("64bit", Is64Bit) .Case("m", HasM) .Case("a", HasA) .Case("f", HasF) Index: clang/include/clang/Basic/BuiltinsRISCV.def =================================================================== --- clang/include/clang/Basic/BuiltinsRISCV.def +++ clang/include/clang/Basic/BuiltinsRISCV.def @@ -19,7 +19,7 @@ // Zbb extension TARGET_BUILTIN(__builtin_riscv_orc_b_32, "ZiZi", "nc", "experimental-zbb") -TARGET_BUILTIN(__builtin_riscv_orc_b_64, "WiWi", "nc", "experimental-zbb") +TARGET_BUILTIN(__builtin_riscv_orc_b_64, "WiWi", "nc", "experimental-zbb,64bit") // Zbc extension TARGET_BUILTIN(__builtin_riscv_clmul, "LiLiLi", "nc", "experimental-zbc")
Index: clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c =================================================================== --- /dev/null +++ clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c @@ -0,0 +1,6 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py +// RUN: %clang_cc1 -triple riscv32 -target-feature +experimental-zbb -verify %s -o - + +int orc_b_64(int a) { + return __builtin_riscv_orc_b_64(a); // expected-error {{builtin requires 'RV64' extension support to be enabled}} +} Index: clang/lib/Sema/SemaChecking.cpp =================================================================== --- clang/lib/Sema/SemaChecking.cpp +++ clang/lib/Sema/SemaChecking.cpp @@ -3422,12 +3422,18 @@ Features.split(ReqFeatures, ','); // Check if each required feature is included - for (auto &I : ReqFeatures) { - if (TI.hasFeature(I)) + for (StringRef F : ReqFeatures) { + if (TI.hasFeature(F)) continue; + + // If the feature is 64bit, alter the string so it will print better in + // the diagnostic. + if (F == "64bit") + F = "RV64"; + // Convert features like "zbr" and "experimental-zbr" to "Zbr". - I.consume_front("experimental-"); - std::string FeatureStr = I.str(); + F.consume_front("experimental-"); + std::string FeatureStr = F.str(); FeatureStr[0] = std::toupper(FeatureStr[0]); // Error message Index: clang/lib/Basic/Targets/RISCV.h =================================================================== --- clang/lib/Basic/Targets/RISCV.h +++ clang/lib/Basic/Targets/RISCV.h @@ -99,6 +99,11 @@ std::string convertConstraint(const char *&Constraint) const override; + bool + initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, + StringRef CPU, + const std::vector<std::string> &FeaturesVec) const override; + bool hasFeature(StringRef Feature) const override; bool handleTargetFeatures(std::vector<std::string> &Features, Index: clang/lib/Basic/Targets/RISCV.cpp =================================================================== --- clang/lib/Basic/Targets/RISCV.cpp +++ clang/lib/Basic/Targets/RISCV.cpp @@ -239,6 +239,16 @@ Builtin::FirstTSBuiltin); } +bool RISCVTargetInfo::initFeatureMap( + llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU, + const std::vector<std::string> &FeaturesVec) const { + + if (getTriple().getArch() == llvm::Triple::riscv64) + Features["64bit"] = true; + + return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec); +} + /// Return true if has this feature, need to sync with handleTargetFeatures. bool RISCVTargetInfo::hasFeature(StringRef Feature) const { bool Is64Bit = getTriple().getArch() == llvm::Triple::riscv64; @@ -246,6 +256,7 @@ .Case("riscv", true) .Case("riscv32", !Is64Bit) .Case("riscv64", Is64Bit) + .Case("64bit", Is64Bit) .Case("m", HasM) .Case("a", HasA) .Case("f", HasF) Index: clang/include/clang/Basic/BuiltinsRISCV.def =================================================================== --- clang/include/clang/Basic/BuiltinsRISCV.def +++ clang/include/clang/Basic/BuiltinsRISCV.def @@ -19,7 +19,7 @@ // Zbb extension TARGET_BUILTIN(__builtin_riscv_orc_b_32, "ZiZi", "nc", "experimental-zbb") -TARGET_BUILTIN(__builtin_riscv_orc_b_64, "WiWi", "nc", "experimental-zbb") +TARGET_BUILTIN(__builtin_riscv_orc_b_64, "WiWi", "nc", "experimental-zbb,64bit") // Zbc extension TARGET_BUILTIN(__builtin_riscv_clmul, "LiLiLi", "nc", "experimental-zbc")
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