nickdesaulniers updated this revision to Diff 340662.
nickdesaulniers added a comment.
- remove comment about string case
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D101327/new/
https://reviews.llvm.org/D101327
Files:
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.h
clang/lib/Driver/ToolChains/Clang.cpp
clang/test/Driver/stack-protector-guard.c
Index: clang/test/Driver/stack-protector-guard.c
===================================================================
--- clang/test/Driver/stack-protector-guard.c
+++ clang/test/Driver/stack-protector-guard.c
@@ -46,6 +46,10 @@
// RUN: -mstack-protector-guard-reg=sp_el0 \
// RUN: -mstack-protector-guard-offset=0 %s 2>&1 | \
// RUN: FileCheck -check-prefix=CHECK-AARCH64 %s
+// RUN: %clang -### -target aarch64-linux-gnu -mstack-protector-guard=sysreg \
+// RUN: -mstack-protector-guard-reg=sp_el2 \
+// RUN: -mstack-protector-guard-offset=0 %s 2>&1 | \
+// RUN: FileCheck -check-prefix=CHECK-AARCH64-SP_EL2 %s
// RUN: %clang -### -target aarch64-linux-gnu \
// RUN: -mstack-protector-guard=tls %s 2>&1 | \
// RUN: FileCheck -check-prefix=INVALID-VALUE-AARCH64 %s
@@ -55,5 +59,6 @@
// RUN: FileCheck -check-prefix=INVALID-REG-AARCH64 %s
// CHECK-AARCH64: "-cc1" {{.*}}"-mstack-protector-guard=sysreg" "-mstack-protector-guard-offset=0" "-mstack-protector-guard-reg=sp_el0"
+// CHECK-AARCH64-SP_EL2: "-cc1" {{.*}}"-mstack-protector-guard=sysreg" "-mstack-protector-guard-offset=0" "-mstack-protector-guard-reg=sp_el2"
// INVALID-VALUE-AARCH64: error: invalid value 'tls' in 'mstack-protector-guard=','valid arguments to '-mstack-protector-guard=' are:sysreg global'
// INVALID-REG-AARCH64: error: invalid value 'foo' in 'mstack-protector-guard-reg=','for AArch64'
Index: clang/lib/Driver/ToolChains/Clang.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -3140,7 +3140,7 @@
<< "for X86, valid arguments to '-mstack-protector-guard-reg=' are:fs gs";
return;
}
- if (EffectiveTriple.isAArch64() && Value != "sp_el0") {
+ if (EffectiveTriple.isAArch64() && !aarch64::isValidSysReg(Value)) {
D.Diag(diag::err_drv_invalid_value_with_suggestion)
<< A->getOption().getName() << Value << "for AArch64";
return;
Index: clang/lib/Driver/ToolChains/Arch/AArch64.h
===================================================================
--- clang/lib/Driver/ToolChains/Arch/AArch64.h
+++ clang/lib/Driver/ToolChains/Arch/AArch64.h
@@ -27,6 +27,8 @@
std::string getAArch64TargetCPU(const llvm::opt::ArgList &Args,
const llvm::Triple &Triple, llvm::opt::Arg *&A);
+bool isValidSysReg(StringRef RegName);
+
} // end namespace aarch64
} // end namespace target
} // end namespace driver
Index: clang/lib/Driver/ToolChains/Arch/AArch64.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -14,6 +14,8 @@
#include "llvm/Support/TargetParser.h"
#include "llvm/Support/Host.h"
+#include <algorithm>
+
using namespace clang::driver;
using namespace clang::driver::tools;
using namespace clang;
@@ -493,3 +495,933 @@
if (Args.hasArg(options::OPT_mno_neg_immediates))
Features.push_back("+no-neg-immediates");
}
+
+/// Checks if a string is a valid sysreg.
+// While it would be good to avoid duplication of
+// llvm::AArch64SysReg::lookupSysRegByName, we don't want to couple CFE to
+// Target/. This list is taken from the generated
+// lib/Target/AArch64/AArch64GenSystemOperands.inc.
+bool aarch64::isValidSysReg(StringRef RegName) {
+ static llvm::SmallVector<StringRef> ValidRegs = {
+ "ACCDATA_EL1",
+ "ACTLR_EL1",
+ "ACTLR_EL2",
+ "ACTLR_EL3",
+ "AFSR0_EL1",
+ "AFSR0_EL12",
+ "AFSR0_EL2",
+ "AFSR0_EL3",
+ "AFSR1_EL1",
+ "AFSR1_EL12",
+ "AFSR1_EL2",
+ "AFSR1_EL3",
+ "AIDR_EL1",
+ "AMAIR_EL1",
+ "AMAIR_EL12",
+ "AMAIR_EL2",
+ "AMAIR_EL3",
+ "AMCFGR_EL0",
+ "AMCGCR_EL0",
+ "AMCNTENCLR0_EL0",
+ "AMCNTENCLR1_EL0",
+ "AMCNTENSET0_EL0",
+ "AMCNTENSET1_EL0",
+ "AMCR_EL0",
+ "AMEVCNTR00_EL0",
+ "AMEVCNTR01_EL0",
+ "AMEVCNTR02_EL0",
+ "AMEVCNTR03_EL0",
+ "AMEVCNTR10_EL0",
+ "AMEVCNTR110_EL0",
+ "AMEVCNTR111_EL0",
+ "AMEVCNTR112_EL0",
+ "AMEVCNTR113_EL0",
+ "AMEVCNTR114_EL0",
+ "AMEVCNTR115_EL0",
+ "AMEVCNTR11_EL0",
+ "AMEVCNTR12_EL0",
+ "AMEVCNTR13_EL0",
+ "AMEVCNTR14_EL0",
+ "AMEVCNTR15_EL0",
+ "AMEVCNTR16_EL0",
+ "AMEVCNTR17_EL0",
+ "AMEVCNTR18_EL0",
+ "AMEVCNTR19_EL0",
+ "AMEVCNTVOFF00_EL2",
+ "AMEVCNTVOFF010_EL2",
+ "AMEVCNTVOFF011_EL2",
+ "AMEVCNTVOFF012_EL2",
+ "AMEVCNTVOFF013_EL2",
+ "AMEVCNTVOFF014_EL2",
+ "AMEVCNTVOFF015_EL2",
+ "AMEVCNTVOFF01_EL2",
+ "AMEVCNTVOFF02_EL2",
+ "AMEVCNTVOFF03_EL2",
+ "AMEVCNTVOFF04_EL2",
+ "AMEVCNTVOFF05_EL2",
+ "AMEVCNTVOFF06_EL2",
+ "AMEVCNTVOFF07_EL2",
+ "AMEVCNTVOFF08_EL2",
+ "AMEVCNTVOFF09_EL2",
+ "AMEVCNTVOFF10_EL2",
+ "AMEVCNTVOFF110_EL2",
+ "AMEVCNTVOFF111_EL2",
+ "AMEVCNTVOFF112_EL2",
+ "AMEVCNTVOFF113_EL2",
+ "AMEVCNTVOFF114_EL2",
+ "AMEVCNTVOFF115_EL2",
+ "AMEVCNTVOFF11_EL2",
+ "AMEVCNTVOFF12_EL2",
+ "AMEVCNTVOFF13_EL2",
+ "AMEVCNTVOFF14_EL2",
+ "AMEVCNTVOFF15_EL2",
+ "AMEVCNTVOFF16_EL2",
+ "AMEVCNTVOFF17_EL2",
+ "AMEVCNTVOFF18_EL2",
+ "AMEVCNTVOFF19_EL2",
+ "AMEVTYPER00_EL0",
+ "AMEVTYPER01_EL0",
+ "AMEVTYPER02_EL0",
+ "AMEVTYPER03_EL0",
+ "AMEVTYPER10_EL0",
+ "AMEVTYPER110_EL0",
+ "AMEVTYPER111_EL0",
+ "AMEVTYPER112_EL0",
+ "AMEVTYPER113_EL0",
+ "AMEVTYPER114_EL0",
+ "AMEVTYPER115_EL0",
+ "AMEVTYPER11_EL0",
+ "AMEVTYPER12_EL0",
+ "AMEVTYPER13_EL0",
+ "AMEVTYPER14_EL0",
+ "AMEVTYPER15_EL0",
+ "AMEVTYPER16_EL0",
+ "AMEVTYPER17_EL0",
+ "AMEVTYPER18_EL0",
+ "AMEVTYPER19_EL0",
+ "AMUSERENR_EL0",
+ "APDAKEYHI_EL1",
+ "APDAKEYLO_EL1",
+ "APDBKEYHI_EL1",
+ "APDBKEYLO_EL1",
+ "APGAKEYHI_EL1",
+ "APGAKEYLO_EL1",
+ "APIAKEYHI_EL1",
+ "APIAKEYLO_EL1",
+ "APIBKEYHI_EL1",
+ "APIBKEYLO_EL1",
+ "BRBCR_EL1",
+ "BRBCR_EL12",
+ "BRBCR_EL2",
+ "BRBFCR_EL1",
+ "BRBIDR0_EL1",
+ "BRBINF0_EL1",
+ "BRBINF10_EL1",
+ "BRBINF11_EL1",
+ "BRBINF12_EL1",
+ "BRBINF13_EL1",
+ "BRBINF14_EL1",
+ "BRBINF15_EL1",
+ "BRBINF16_EL1",
+ "BRBINF17_EL1",
+ "BRBINF18_EL1",
+ "BRBINF19_EL1",
+ "BRBINF1_EL1",
+ "BRBINF20_EL1",
+ "BRBINF21_EL1",
+ "BRBINF22_EL1",
+ "BRBINF23_EL1",
+ "BRBINF24_EL1",
+ "BRBINF25_EL1",
+ "BRBINF26_EL1",
+ "BRBINF27_EL1",
+ "BRBINF28_EL1",
+ "BRBINF29_EL1",
+ "BRBINF2_EL1",
+ "BRBINF30_EL1",
+ "BRBINF31_EL1",
+ "BRBINF3_EL1",
+ "BRBINF4_EL1",
+ "BRBINF5_EL1",
+ "BRBINF6_EL1",
+ "BRBINF7_EL1",
+ "BRBINF8_EL1",
+ "BRBINF9_EL1",
+ "BRBINFINJ_EL1",
+ "BRBSRC0_EL1",
+ "BRBSRC10_EL1",
+ "BRBSRC11_EL1",
+ "BRBSRC12_EL1",
+ "BRBSRC13_EL1",
+ "BRBSRC14_EL1",
+ "BRBSRC15_EL1",
+ "BRBSRC16_EL1",
+ "BRBSRC17_EL1",
+ "BRBSRC18_EL1",
+ "BRBSRC19_EL1",
+ "BRBSRC1_EL1",
+ "BRBSRC20_EL1",
+ "BRBSRC21_EL1",
+ "BRBSRC22_EL1",
+ "BRBSRC23_EL1",
+ "BRBSRC24_EL1",
+ "BRBSRC25_EL1",
+ "BRBSRC26_EL1",
+ "BRBSRC27_EL1",
+ "BRBSRC28_EL1",
+ "BRBSRC29_EL1",
+ "BRBSRC2_EL1",
+ "BRBSRC30_EL1",
+ "BRBSRC31_EL1",
+ "BRBSRC3_EL1",
+ "BRBSRC4_EL1",
+ "BRBSRC5_EL1",
+ "BRBSRC6_EL1",
+ "BRBSRC7_EL1",
+ "BRBSRC8_EL1",
+ "BRBSRC9_EL1",
+ "BRBSRCINJ_EL1",
+ "BRBTGT0_EL1",
+ "BRBTGT10_EL1",
+ "BRBTGT11_EL1",
+ "BRBTGT12_EL1",
+ "BRBTGT13_EL1",
+ "BRBTGT14_EL1",
+ "BRBTGT15_EL1",
+ "BRBTGT16_EL1",
+ "BRBTGT17_EL1",
+ "BRBTGT18_EL1",
+ "BRBTGT19_EL1",
+ "BRBTGT1_EL1",
+ "BRBTGT20_EL1",
+ "BRBTGT21_EL1",
+ "BRBTGT22_EL1",
+ "BRBTGT23_EL1",
+ "BRBTGT24_EL1",
+ "BRBTGT25_EL1",
+ "BRBTGT26_EL1",
+ "BRBTGT27_EL1",
+ "BRBTGT28_EL1",
+ "BRBTGT29_EL1",
+ "BRBTGT2_EL1",
+ "BRBTGT30_EL1",
+ "BRBTGT31_EL1",
+ "BRBTGT3_EL1",
+ "BRBTGT4_EL1",
+ "BRBTGT5_EL1",
+ "BRBTGT6_EL1",
+ "BRBTGT7_EL1",
+ "BRBTGT8_EL1",
+ "BRBTGT9_EL1",
+ "BRBTGTINJ_EL1",
+ "BRBTS_EL1",
+ "CCSIDR2_EL1",
+ "CCSIDR_EL1",
+ "CLIDR_EL1",
+ "CNTFRQ_EL0",
+ "CNTHCTL_EL2",
+ "CNTHPS_CTL_EL2",
+ "CNTHPS_CVAL_EL2",
+ "CNTHPS_TVAL_EL2",
+ "CNTHP_CTL_EL2",
+ "CNTHP_CVAL_EL2",
+ "CNTHP_TVAL_EL2",
+ "CNTHVS_CTL_EL2",
+ "CNTHVS_CVAL_EL2",
+ "CNTHVS_TVAL_EL2",
+ "CNTHV_CTL_EL2",
+ "CNTHV_CVAL_EL2",
+ "CNTHV_TVAL_EL2",
+ "CNTISCALE_EL2",
+ "CNTKCTL_EL1",
+ "CNTKCTL_EL12",
+ "CNTPCTSS_EL0",
+ "CNTPCT_EL0",
+ "CNTPOFF_EL2",
+ "CNTPS_CTL_EL1",
+ "CNTPS_CVAL_EL1",
+ "CNTPS_TVAL_EL1",
+ "CNTP_CTL_EL0",
+ "CNTP_CTL_EL02",
+ "CNTP_CVAL_EL0",
+ "CNTP_CVAL_EL02",
+ "CNTP_TVAL_EL0",
+ "CNTP_TVAL_EL02",
+ "CNTSCALE_EL2",
+ "CNTVCTSS_EL0",
+ "CNTVCT_EL0",
+ "CNTVFRQ_EL2",
+ "CNTVOFF_EL2",
+ "CNTV_CTL_EL0",
+ "CNTV_CTL_EL02",
+ "CNTV_CVAL_EL0",
+ "CNTV_CVAL_EL02",
+ "CNTV_TVAL_EL0",
+ "CNTV_TVAL_EL02",
+ "CONTEXTIDR_EL1",
+ "CONTEXTIDR_EL12",
+ "CONTEXTIDR_EL2",
+ "CPACR_EL1",
+ "CPACR_EL12",
+ "CPM_IOACC_CTL_EL3",
+ "CPTR_EL2",
+ "CPTR_EL3",
+ "CSSELR_EL1",
+ "CTR_EL0",
+ "CURRENTEL",
+ "DACR32_EL2",
+ "DAIF",
+ "DBGAUTHSTATUS_EL1",
+ "DBGBCR0_EL1",
+ "DBGBCR10_EL1",
+ "DBGBCR11_EL1",
+ "DBGBCR12_EL1",
+ "DBGBCR13_EL1",
+ "DBGBCR14_EL1",
+ "DBGBCR15_EL1",
+ "DBGBCR1_EL1",
+ "DBGBCR2_EL1",
+ "DBGBCR3_EL1",
+ "DBGBCR4_EL1",
+ "DBGBCR5_EL1",
+ "DBGBCR6_EL1",
+ "DBGBCR7_EL1",
+ "DBGBCR8_EL1",
+ "DBGBCR9_EL1",
+ "DBGBVR0_EL1",
+ "DBGBVR10_EL1",
+ "DBGBVR11_EL1",
+ "DBGBVR12_EL1",
+ "DBGBVR13_EL1",
+ "DBGBVR14_EL1",
+ "DBGBVR15_EL1",
+ "DBGBVR1_EL1",
+ "DBGBVR2_EL1",
+ "DBGBVR3_EL1",
+ "DBGBVR4_EL1",
+ "DBGBVR5_EL1",
+ "DBGBVR6_EL1",
+ "DBGBVR7_EL1",
+ "DBGBVR8_EL1",
+ "DBGBVR9_EL1",
+ "DBGCLAIMCLR_EL1",
+ "DBGCLAIMSET_EL1",
+ "DBGDTRRX_EL0",
+ "DBGDTRTX_EL0",
+ "DBGDTR_EL0",
+ "DBGPRCR_EL1",
+ "DBGVCR32_EL2",
+ "DBGWCR0_EL1",
+ "DBGWCR10_EL1",
+ "DBGWCR11_EL1",
+ "DBGWCR12_EL1",
+ "DBGWCR13_EL1",
+ "DBGWCR14_EL1",
+ "DBGWCR15_EL1",
+ "DBGWCR1_EL1",
+ "DBGWCR2_EL1",
+ "DBGWCR3_EL1",
+ "DBGWCR4_EL1",
+ "DBGWCR5_EL1",
+ "DBGWCR6_EL1",
+ "DBGWCR7_EL1",
+ "DBGWCR8_EL1",
+ "DBGWCR9_EL1",
+ "DBGWVR0_EL1",
+ "DBGWVR10_EL1",
+ "DBGWVR11_EL1",
+ "DBGWVR12_EL1",
+ "DBGWVR13_EL1",
+ "DBGWVR14_EL1",
+ "DBGWVR15_EL1",
+ "DBGWVR1_EL1",
+ "DBGWVR2_EL1",
+ "DBGWVR3_EL1",
+ "DBGWVR4_EL1",
+ "DBGWVR5_EL1",
+ "DBGWVR6_EL1",
+ "DBGWVR7_EL1",
+ "DBGWVR8_EL1",
+ "DBGWVR9_EL1",
+ "DCZID_EL0",
+ "DISR_EL1",
+ "DIT",
+ "DLR_EL0",
+ "DSPSR_EL0",
+ "ELR_EL1",
+ "ELR_EL12",
+ "ELR_EL2",
+ "ELR_EL3",
+ "ERRIDR_EL1",
+ "ERRSELR_EL1",
+ "ERXADDR_EL1",
+ "ERXCTLR_EL1",
+ "ERXFR_EL1",
+ "ERXMISC0_EL1",
+ "ERXMISC1_EL1",
+ "ERXMISC2_EL1",
+ "ERXMISC3_EL1",
+ "ERXPFGCDN_EL1",
+ "ERXPFGCTL_EL1",
+ "ERXPFGF_EL1",
+ "ERXSTATUS_EL1",
+ "ESR_EL1",
+ "ESR_EL12",
+ "ESR_EL2",
+ "ESR_EL3",
+ "FAR_EL1",
+ "FAR_EL12",
+ "FAR_EL2",
+ "FAR_EL3",
+ "FPCR",
+ "FPEXC32_EL2",
+ "FPSR",
+ "GCR_EL1",
+ "GMID_EL1",
+ "HACR_EL2",
+ "HCRX_EL2",
+ "HCR_EL2",
+ "HDFGRTR_EL2",
+ "HDFGWTR_EL2",
+ "HFGITR_EL2",
+ "HFGRTR_EL2",
+ "HFGWTR_EL2",
+ "HPFAR_EL2",
+ "HSTR_EL2",
+ "ICC_AP0R0_EL1",
+ "ICC_AP0R1_EL1",
+ "ICC_AP0R2_EL1",
+ "ICC_AP0R3_EL1",
+ "ICC_AP1R0_EL1",
+ "ICC_AP1R1_EL1",
+ "ICC_AP1R2_EL1",
+ "ICC_AP1R3_EL1",
+ "ICC_ASGI1R_EL1",
+ "ICC_BPR0_EL1",
+ "ICC_BPR1_EL1",
+ "ICC_CTLR_EL1",
+ "ICC_CTLR_EL3",
+ "ICC_DIR_EL1",
+ "ICC_EOIR0_EL1",
+ "ICC_EOIR1_EL1",
+ "ICC_HPPIR0_EL1",
+ "ICC_HPPIR1_EL1",
+ "ICC_IAR0_EL1",
+ "ICC_IAR1_EL1",
+ "ICC_IGRPEN0_EL1",
+ "ICC_IGRPEN1_EL1",
+ "ICC_IGRPEN1_EL3",
+ "ICC_PMR_EL1",
+ "ICC_RPR_EL1",
+ "ICC_SGI0R_EL1",
+ "ICC_SGI1R_EL1",
+ "ICC_SRE_EL1",
+ "ICC_SRE_EL2",
+ "ICC_SRE_EL3",
+ "ICH_AP0R0_EL2",
+ "ICH_AP0R1_EL2",
+ "ICH_AP0R2_EL2",
+ "ICH_AP0R3_EL2",
+ "ICH_AP1R0_EL2",
+ "ICH_AP1R1_EL2",
+ "ICH_AP1R2_EL2",
+ "ICH_AP1R3_EL2",
+ "ICH_EISR_EL2",
+ "ICH_ELRSR_EL2",
+ "ICH_HCR_EL2",
+ "ICH_LR0_EL2",
+ "ICH_LR10_EL2",
+ "ICH_LR11_EL2",
+ "ICH_LR12_EL2",
+ "ICH_LR13_EL2",
+ "ICH_LR14_EL2",
+ "ICH_LR15_EL2",
+ "ICH_LR1_EL2",
+ "ICH_LR2_EL2",
+ "ICH_LR3_EL2",
+ "ICH_LR4_EL2",
+ "ICH_LR5_EL2",
+ "ICH_LR6_EL2",
+ "ICH_LR7_EL2",
+ "ICH_LR8_EL2",
+ "ICH_LR9_EL2",
+ "ICH_MISR_EL2",
+ "ICH_VMCR_EL2",
+ "ICH_VTR_EL2",
+ "ID_AA64AFR0_EL1",
+ "ID_AA64AFR1_EL1",
+ "ID_AA64DFR0_EL1",
+ "ID_AA64DFR1_EL1",
+ "ID_AA64ISAR0_EL1",
+ "ID_AA64ISAR1_EL1",
+ "ID_AA64ISAR2_EL1",
+ "ID_AA64MMFR0_EL1",
+ "ID_AA64MMFR1_EL1",
+ "ID_AA64MMFR2_EL1",
+ "ID_AA64PFR0_EL1",
+ "ID_AA64PFR1_EL1",
+ "ID_AA64ZFR0_EL1",
+ "ID_AFR0_EL1",
+ "ID_DFR0_EL1",
+ "ID_ISAR0_EL1",
+ "ID_ISAR1_EL1",
+ "ID_ISAR2_EL1",
+ "ID_ISAR3_EL1",
+ "ID_ISAR4_EL1",
+ "ID_ISAR5_EL1",
+ "ID_ISAR6_EL1",
+ "ID_MMFR0_EL1",
+ "ID_MMFR1_EL1",
+ "ID_MMFR2_EL1",
+ "ID_MMFR3_EL1",
+ "ID_MMFR4_EL1",
+ "ID_MMFR5_EL1",
+ "ID_PFR0_EL1",
+ "ID_PFR1_EL1",
+ "ID_PFR2_EL1",
+ "IFSR32_EL2",
+ "ISR_EL1",
+ "LORC_EL1",
+ "LOREA_EL1",
+ "LORID_EL1",
+ "LORN_EL1",
+ "LORSA_EL1",
+ "MAIR_EL1",
+ "MAIR_EL12",
+ "MAIR_EL2",
+ "MAIR_EL3",
+ "MDCCINT_EL1",
+ "MDCCSR_EL0",
+ "MDCR_EL2",
+ "MDCR_EL3",
+ "MDRAR_EL1",
+ "MDSCR_EL1",
+ "MIDR_EL1",
+ "MPAM0_EL1",
+ "MPAM1_EL1",
+ "MPAM1_EL12",
+ "MPAM2_EL2",
+ "MPAM3_EL3",
+ "MPAMHCR_EL2",
+ "MPAMIDR_EL1",
+ "MPAMVPM0_EL2",
+ "MPAMVPM1_EL2",
+ "MPAMVPM2_EL2",
+ "MPAMVPM3_EL2",
+ "MPAMVPM4_EL2",
+ "MPAMVPM5_EL2",
+ "MPAMVPM6_EL2",
+ "MPAMVPM7_EL2",
+ "MPAMVPMV_EL2",
+ "MPIDR_EL1",
+ "MVFR0_EL1",
+ "MVFR1_EL1",
+ "MVFR2_EL1",
+ "NZCV",
+ "OSDLR_EL1",
+ "OSDTRRX_EL1",
+ "OSDTRTX_EL1",
+ "OSECCR_EL1",
+ "OSLAR_EL1",
+ "OSLSR_EL1",
+ "PAN",
+ "PAR_EL1",
+ "PMBIDR_EL1",
+ "PMBLIMITR_EL1",
+ "PMBPTR_EL1",
+ "PMBSR_EL1",
+ "PMCCFILTR_EL0",
+ "PMCCNTR_EL0",
+ "PMCEID0_EL0",
+ "PMCEID1_EL0",
+ "PMCNTENCLR_EL0",
+ "PMCNTENSET_EL0",
+ "PMCR_EL0",
+ "PMEVCNTR0_EL0",
+ "PMEVCNTR10_EL0",
+ "PMEVCNTR11_EL0",
+ "PMEVCNTR12_EL0",
+ "PMEVCNTR13_EL0",
+ "PMEVCNTR14_EL0",
+ "PMEVCNTR15_EL0",
+ "PMEVCNTR16_EL0",
+ "PMEVCNTR17_EL0",
+ "PMEVCNTR18_EL0",
+ "PMEVCNTR19_EL0",
+ "PMEVCNTR1_EL0",
+ "PMEVCNTR20_EL0",
+ "PMEVCNTR21_EL0",
+ "PMEVCNTR22_EL0",
+ "PMEVCNTR23_EL0",
+ "PMEVCNTR24_EL0",
+ "PMEVCNTR25_EL0",
+ "PMEVCNTR26_EL0",
+ "PMEVCNTR27_EL0",
+ "PMEVCNTR28_EL0",
+ "PMEVCNTR29_EL0",
+ "PMEVCNTR2_EL0",
+ "PMEVCNTR30_EL0",
+ "PMEVCNTR3_EL0",
+ "PMEVCNTR4_EL0",
+ "PMEVCNTR5_EL0",
+ "PMEVCNTR6_EL0",
+ "PMEVCNTR7_EL0",
+ "PMEVCNTR8_EL0",
+ "PMEVCNTR9_EL0",
+ "PMEVTYPER0_EL0",
+ "PMEVTYPER10_EL0",
+ "PMEVTYPER11_EL0",
+ "PMEVTYPER12_EL0",
+ "PMEVTYPER13_EL0",
+ "PMEVTYPER14_EL0",
+ "PMEVTYPER15_EL0",
+ "PMEVTYPER16_EL0",
+ "PMEVTYPER17_EL0",
+ "PMEVTYPER18_EL0",
+ "PMEVTYPER19_EL0",
+ "PMEVTYPER1_EL0",
+ "PMEVTYPER20_EL0",
+ "PMEVTYPER21_EL0",
+ "PMEVTYPER22_EL0",
+ "PMEVTYPER23_EL0",
+ "PMEVTYPER24_EL0",
+ "PMEVTYPER25_EL0",
+ "PMEVTYPER26_EL0",
+ "PMEVTYPER27_EL0",
+ "PMEVTYPER28_EL0",
+ "PMEVTYPER29_EL0",
+ "PMEVTYPER2_EL0",
+ "PMEVTYPER30_EL0",
+ "PMEVTYPER3_EL0",
+ "PMEVTYPER4_EL0",
+ "PMEVTYPER5_EL0",
+ "PMEVTYPER6_EL0",
+ "PMEVTYPER7_EL0",
+ "PMEVTYPER8_EL0",
+ "PMEVTYPER9_EL0",
+ "PMINTENCLR_EL1",
+ "PMINTENSET_EL1",
+ "PMMIR_EL1",
+ "PMOVSCLR_EL0",
+ "PMOVSSET_EL0",
+ "PMSCR_EL1",
+ "PMSCR_EL12",
+ "PMSCR_EL2",
+ "PMSELR_EL0",
+ "PMSEVFR_EL1",
+ "PMSFCR_EL1",
+ "PMSICR_EL1",
+ "PMSIDR_EL1",
+ "PMSIRR_EL1",
+ "PMSLATFR_EL1",
+ "PMSNEVFR_EL1",
+ "PMSWINC_EL0",
+ "PMUSERENR_EL0",
+ "PMXEVCNTR_EL0",
+ "PMXEVTYPER_EL0",
+ "REVIDR_EL1",
+ "RGSR_EL1",
+ "RMR_EL1",
+ "RMR_EL2",
+ "RMR_EL3",
+ "RNDR",
+ "RNDRRS",
+ "RVBAR_EL1",
+ "RVBAR_EL2",
+ "RVBAR_EL3",
+ "SCR_EL3",
+ "SCTLR_EL1",
+ "SCTLR_EL12",
+ "SCTLR_EL2",
+ "SCTLR_EL3",
+ "SCXTNUM_EL0",
+ "SCXTNUM_EL1",
+ "SCXTNUM_EL12",
+ "SCXTNUM_EL2",
+ "SCXTNUM_EL3",
+ "SDER32_EL2",
+ "SDER32_EL3",
+ "SPSEL",
+ "SPSR_ABT",
+ "SPSR_EL1",
+ "SPSR_EL12",
+ "SPSR_EL2",
+ "SPSR_EL3",
+ "SPSR_FIQ",
+ "SPSR_IRQ",
+ "SPSR_UND",
+ "SP_EL0",
+ "SP_EL1",
+ "SP_EL2",
+ "SSBS",
+ "TCO",
+ "TCR_EL1",
+ "TCR_EL12",
+ "TCR_EL2",
+ "TCR_EL3",
+ "TEECR32_EL1",
+ "TEEHBR32_EL1",
+ "TFSRE0_EL1",
+ "TFSR_EL1",
+ "TFSR_EL12",
+ "TFSR_EL2",
+ "TFSR_EL3",
+ "TPIDRRO_EL0",
+ "TPIDR_EL0",
+ "TPIDR_EL1",
+ "TPIDR_EL2",
+ "TPIDR_EL3",
+ "TRBBASER_EL1",
+ "TRBIDR_EL1",
+ "TRBLIMITR_EL1",
+ "TRBMAR_EL1",
+ "TRBPTR_EL1",
+ "TRBSR_EL1",
+ "TRBTRG_EL1",
+ "TRCACATR0",
+ "TRCACATR1",
+ "TRCACATR10",
+ "TRCACATR11",
+ "TRCACATR12",
+ "TRCACATR13",
+ "TRCACATR14",
+ "TRCACATR15",
+ "TRCACATR2",
+ "TRCACATR3",
+ "TRCACATR4",
+ "TRCACATR5",
+ "TRCACATR6",
+ "TRCACATR7",
+ "TRCACATR8",
+ "TRCACATR9",
+ "TRCACVR0",
+ "TRCACVR1",
+ "TRCACVR10",
+ "TRCACVR11",
+ "TRCACVR12",
+ "TRCACVR13",
+ "TRCACVR14",
+ "TRCACVR15",
+ "TRCACVR2",
+ "TRCACVR3",
+ "TRCACVR4",
+ "TRCACVR5",
+ "TRCACVR6",
+ "TRCACVR7",
+ "TRCACVR8",
+ "TRCACVR9",
+ "TRCAUTHSTATUS",
+ "TRCAUXCTLR",
+ "TRCBBCTLR",
+ "TRCCCCTLR",
+ "TRCCIDCCTLR0",
+ "TRCCIDCCTLR1",
+ "TRCCIDCVR0",
+ "TRCCIDCVR1",
+ "TRCCIDCVR2",
+ "TRCCIDCVR3",
+ "TRCCIDCVR4",
+ "TRCCIDCVR5",
+ "TRCCIDCVR6",
+ "TRCCIDCVR7",
+ "TRCCIDR0",
+ "TRCCIDR1",
+ "TRCCIDR2",
+ "TRCCIDR3",
+ "TRCCLAIMCLR",
+ "TRCCLAIMSET",
+ "TRCCNTCTLR0",
+ "TRCCNTCTLR1",
+ "TRCCNTCTLR2",
+ "TRCCNTCTLR3",
+ "TRCCNTRLDVR0",
+ "TRCCNTRLDVR1",
+ "TRCCNTRLDVR2",
+ "TRCCNTRLDVR3",
+ "TRCCNTVR0",
+ "TRCCNTVR1",
+ "TRCCNTVR2",
+ "TRCCNTVR3",
+ "TRCCONFIGR",
+ "TRCDEVAFF0",
+ "TRCDEVAFF1",
+ "TRCDEVARCH",
+ "TRCDEVID",
+ "TRCDEVTYPE",
+ "TRCDVCMR0",
+ "TRCDVCMR1",
+ "TRCDVCMR2",
+ "TRCDVCMR3",
+ "TRCDVCMR4",
+ "TRCDVCMR5",
+ "TRCDVCMR6",
+ "TRCDVCMR7",
+ "TRCDVCVR0",
+ "TRCDVCVR1",
+ "TRCDVCVR2",
+ "TRCDVCVR3",
+ "TRCDVCVR4",
+ "TRCDVCVR5",
+ "TRCDVCVR6",
+ "TRCDVCVR7",
+ "TRCEVENTCTL0R",
+ "TRCEVENTCTL1R",
+ "TRCEXTINSELR",
+ "TRCEXTINSELR0",
+ "TRCEXTINSELR1",
+ "TRCEXTINSELR2",
+ "TRCEXTINSELR3",
+ "TRCIDR0",
+ "TRCIDR1",
+ "TRCIDR10",
+ "TRCIDR11",
+ "TRCIDR12",
+ "TRCIDR13",
+ "TRCIDR2",
+ "TRCIDR3",
+ "TRCIDR4",
+ "TRCIDR5",
+ "TRCIDR6",
+ "TRCIDR7",
+ "TRCIDR8",
+ "TRCIDR9",
+ "TRCIMSPEC0",
+ "TRCIMSPEC1",
+ "TRCIMSPEC2",
+ "TRCIMSPEC3",
+ "TRCIMSPEC4",
+ "TRCIMSPEC5",
+ "TRCIMSPEC6",
+ "TRCIMSPEC7",
+ "TRCITCTRL",
+ "TRCLAR",
+ "TRCLSR",
+ "TRCOSLAR",
+ "TRCOSLSR",
+ "TRCPDCR",
+ "TRCPDSR",
+ "TRCPIDR0",
+ "TRCPIDR1",
+ "TRCPIDR2",
+ "TRCPIDR3",
+ "TRCPIDR4",
+ "TRCPIDR5",
+ "TRCPIDR6",
+ "TRCPIDR7",
+ "TRCPRGCTLR",
+ "TRCPROCSELR",
+ "TRCQCTLR",
+ "TRCRSCTLR10",
+ "TRCRSCTLR11",
+ "TRCRSCTLR12",
+ "TRCRSCTLR13",
+ "TRCRSCTLR14",
+ "TRCRSCTLR15",
+ "TRCRSCTLR16",
+ "TRCRSCTLR17",
+ "TRCRSCTLR18",
+ "TRCRSCTLR19",
+ "TRCRSCTLR2",
+ "TRCRSCTLR20",
+ "TRCRSCTLR21",
+ "TRCRSCTLR22",
+ "TRCRSCTLR23",
+ "TRCRSCTLR24",
+ "TRCRSCTLR25",
+ "TRCRSCTLR26",
+ "TRCRSCTLR27",
+ "TRCRSCTLR28",
+ "TRCRSCTLR29",
+ "TRCRSCTLR3",
+ "TRCRSCTLR30",
+ "TRCRSCTLR31",
+ "TRCRSCTLR4",
+ "TRCRSCTLR5",
+ "TRCRSCTLR6",
+ "TRCRSCTLR7",
+ "TRCRSCTLR8",
+ "TRCRSCTLR9",
+ "TRCRSR",
+ "TRCSEQEVR0",
+ "TRCSEQEVR1",
+ "TRCSEQEVR2",
+ "TRCSEQRSTEVR",
+ "TRCSEQSTR",
+ "TRCSSCCR0",
+ "TRCSSCCR1",
+ "TRCSSCCR2",
+ "TRCSSCCR3",
+ "TRCSSCCR4",
+ "TRCSSCCR5",
+ "TRCSSCCR6",
+ "TRCSSCCR7",
+ "TRCSSCSR0",
+ "TRCSSCSR1",
+ "TRCSSCSR2",
+ "TRCSSCSR3",
+ "TRCSSCSR4",
+ "TRCSSCSR5",
+ "TRCSSCSR6",
+ "TRCSSCSR7",
+ "TRCSSPCICR0",
+ "TRCSSPCICR1",
+ "TRCSSPCICR2",
+ "TRCSSPCICR3",
+ "TRCSSPCICR4",
+ "TRCSSPCICR5",
+ "TRCSSPCICR6",
+ "TRCSSPCICR7",
+ "TRCSTALLCTLR",
+ "TRCSTATR",
+ "TRCSYNCPR",
+ "TRCTRACEIDR",
+ "TRCTSCTLR",
+ "TRCVDARCCTLR",
+ "TRCVDCTLR",
+ "TRCVDSACCTLR",
+ "TRCVICTLR",
+ "TRCVIIECTLR",
+ "TRCVIPCSSCTLR",
+ "TRCVISSCTLR",
+ "TRCVMIDCCTLR0",
+ "TRCVMIDCCTLR1",
+ "TRCVMIDCVR0",
+ "TRCVMIDCVR1",
+ "TRCVMIDCVR2",
+ "TRCVMIDCVR3",
+ "TRCVMIDCVR4",
+ "TRCVMIDCVR5",
+ "TRCVMIDCVR6",
+ "TRCVMIDCVR7",
+ "TRFCR_EL1",
+ "TRFCR_EL12",
+ "TRFCR_EL2",
+ "TTBR0_EL1",
+ "TTBR0_EL12",
+ "TTBR0_EL2",
+ "TTBR0_EL3",
+ "TTBR1_EL1",
+ "TTBR1_EL12",
+ "TTBR1_EL2",
+ "UAO",
+ "VBAR_EL1",
+ "VBAR_EL12",
+ "VBAR_EL2",
+ "VBAR_EL3",
+ "VDISR_EL2",
+ "VMPIDR_EL2",
+ "VNCR_EL2",
+ "VPIDR_EL2",
+ "VSESR_EL2",
+ "VSTCR_EL2",
+ "VSTTBR_EL2",
+ "VTCR_EL2",
+ "VTTBR_EL2",
+ "ZCR_EL1",
+ "ZCR_EL12",
+ "ZCR_EL2",
+ "ZCR_EL3",
+ };
+ return std::find(ValidRegs.begin(), ValidRegs.end(), RegName.upper()) !=
+ ValidRegs.end();
+}
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