quinnp updated this revision to Diff 359077.
quinnp added a comment.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Removing some FIXME comments and tests that are handled elsewhere with 
semachecking.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D105834/new/

https://reviews.llvm.org/D105834

Files:
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-pwr8.c
  clang/test/CodeGen/builtins-ppc-xlcompat-sync.c
  llvm/include/llvm/IR/IntrinsicsPowerPC.td
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll

Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll
@@ -94,7 +94,6 @@
 }
 declare void @llvm.ppc.iospace.sync()
 
-; FIXME: __icbt is only valid for pwr8 and up.
 define dso_local void @test_builtin_ppc_icbt() {
 ; CHECK-LABEL: test_builtin_ppc_icbt:
 ; CHECK:       # %bb.0: # %entry
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-32.ll
@@ -15,6 +15,7 @@
 
 define dso_local void @test_builtin_ppc_eieio() {
 ; CHECK-LABEL: test_builtin_ppc_eieio:
+1
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    ori 2, 2, 0
 ; CHECK-NEXT:    ori 2, 2, 0
@@ -60,18 +61,3 @@
   ret void
 }
 declare void @llvm.ppc.iospace.sync()
-
-; FIXME: __icbt is only valid for pwr8 and up.
-define dso_local void @test_builtin_ppc_icbt() {
-; CHECK-LABEL: test_builtin_ppc_icbt:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    lwz 3, -8(1)
-; CHECK-NEXT:    icbt 0, 0, 3
-; CHECK-NEXT:    blr
-entry:
-  %a = alloca i8*, align 8
-  %0 = load i8*, i8** %a, align 8
-  call void @llvm.ppc.icbt(i8* %0)
-  ret void
-}
-declare void @llvm.ppc.icbt(i8*)
Index: llvm/include/llvm/IR/IntrinsicsPowerPC.td
===================================================================
--- llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -1534,7 +1534,6 @@
     [IntrArgMemOnly, NoCapture<ArgIndex<0>>]>;
   def int_ppc_dcbz  : GCCBuiltin<"__builtin_ppc_dcbz">,
                       Intrinsic<[], [llvm_ptr_ty], []>;
-// FIXME: __icbt is only valid for pwr8 and up.
   def int_ppc_icbt : GCCBuiltin<"__builtin_ppc_icbt">,
                      Intrinsic<[], [llvm_ptr_ty], []>;
   
Index: clang/test/CodeGen/builtins-ppc-xlcompat-sync.c
===================================================================
--- clang/test/CodeGen/builtins-ppc-xlcompat-sync.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-sync.c
@@ -224,23 +224,6 @@
   __dcbz(c);
 }
 
-// FIXME: __icbt is only valid for pwr8 and up.
-// CHECK-LABEL: @test_icbt(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = load i8*, i8** @c, align 8
-// CHECK-NEXT:    call void @llvm.ppc.icbt(i8* [[TMP0]])
-// CHECK-NEXT:    ret void
-//
-// CHECK-32-LABEL: @test_icbt(
-// CHECK-32-NEXT:  entry:
-// CHECK-32-NEXT:    [[TMP0:%.*]] = load i8*, i8** @c, align 4
-// CHECK-32-NEXT:    call void @llvm.ppc.icbt(i8* [[TMP0]])
-// CHECK-32-NEXT:    ret void
-//
-void test_icbt() {
-  __icbt(c);
-}
-
 // CHECK-LABEL: @test_builtin_ppc_popcntb(
 // CHECK-NEXT:  entry:
 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, i64* @a, align 8
@@ -452,20 +435,3 @@
 void test_builtin_ppc_dcbz() {
   __builtin_ppc_dcbz(c);
 }
-
-// FIXME: __icbt is only valid for pwr8 and up.
-// CHECK-LABEL: @test_builtin_ppc_icbt(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = load i8*, i8** @c, align 8
-// CHECK-NEXT:    call void @llvm.ppc.icbt(i8* [[TMP0]])
-// CHECK-NEXT:    ret void
-//
-// CHECK-32-LABEL: @test_builtin_ppc_icbt(
-// CHECK-32-NEXT:  entry:
-// CHECK-32-NEXT:    [[TMP0:%.*]] = load i8*, i8** @c, align 4
-// CHECK-32-NEXT:    call void @llvm.ppc.icbt(i8* [[TMP0]])
-// CHECK-32-NEXT:    ret void
-//
-void test_builtin_ppc_icbt() {
-  __builtin_ppc_icbt(c);
-}
Index: clang/test/CodeGen/builtins-ppc-xlcompat-pwr8.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/builtins-ppc-xlcompat-pwr8.c
@@ -0,0 +1,32 @@
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s \
+// RUN:   -target-cpu pwr8 -o - | FileCheck %s -check-prefix=CHECK-PWR8
+// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
+// RUN:   -target-cpu pwr8 -o - | FileCheck %s -check-prefix=CHECK-PWR8
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \
+// RUN:   -target-cpu pwr8 -o - | FileCheck %s -check-prefix=CHECK-PWR8
+// RUN: %clang_cc1 -triple powerpc-unknown-aix %s -emit-llvm %s \
+// RUN:   -target-cpu pwr8 -o - | FileCheck %s -check-prefix=CHECK-PWR8
+// RUN: not %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s \
+// RUN:   -target-cpu pwr7 2>&1 | FileCheck %s -check-prefix=CHECK-NOPWR8
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \
+// RUN:   -target-cpu pwr7 2>&1 | FileCheck %s -check-prefix=CHECK-NOPWR8
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix %s -emit-llvm %s \
+// RUN:   -target-cpu pwr7 2>&1 | FileCheck %s -check-prefix=CHECK-NOPWR8
+
+extern void *a;
+
+void test_icbt() {
+// CHECK-LABEL: @test_icbt(
+
+  __icbt(a);
+// CHECK-PWR8: call void @llvm.ppc.icbt(i8* %0)
+// CHECK-NOPWR8: error: this builtin is only valid on POWER8 or later CPUs
+}
+
+void test_builtin_ppc_icbt() {
+// CHECK-LABEL: @test_builtin_ppc_icbt(
+
+  __builtin_ppc_icbt(a);
+// CHECK-PWR8: call void @llvm.ppc.icbt(i8* %0)
+// CHECK-NOPWR8: error: this builtin is only valid on POWER8 or later CPUs
+}
Index: clang/lib/Sema/SemaChecking.cpp
===================================================================
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -3412,6 +3412,9 @@
   case PPC::BI__builtin_ppc_rldimi:
     return SemaBuiltinConstantArg(TheCall, 2, Result) ||
            SemaValueIsRunOfOnes(TheCall, 3);
+  case PPC::BI__builtin_ppc_icbt:
+    return SemaFeatureCheck(*this, TheCall, "isa-v207-instructions",
+                            diag::err_ppc_builtin_only_on_arch, "8");
 #define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \
   case PPC::BI__builtin_##Name: \
     return SemaBuiltinPPCMMACall(TheCall, Types);
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