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The getConstraintRegister method is used by semantic checking of inline 
assembly statements in order to diagnose conflicts between clobber list and 
input/output lists. By overriding getConstraintRegister we get those 
diagnostics and we match RISC-V GCC's behavior. The implementation is trivial 
due to the lack of single-register RISC-V-specific constraints.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D108624

Files:
  clang/lib/Basic/Targets/RISCV.h
  clang/test/Sema/inline-asm-validate-riscv.c


Index: clang/test/Sema/inline-asm-validate-riscv.c
===================================================================
--- clang/test/Sema/inline-asm-validate-riscv.c
+++ clang/test/Sema/inline-asm-validate-riscv.c
@@ -21,3 +21,11 @@
   asm volatile ("" :: "K"(BelowMin)); // expected-error{{value '-1' out of 
range for constraint 'K'}}
   asm volatile ("" :: "K"(AboveMax)); // expected-error{{value '32' out of 
range for constraint 'K'}}
 }
+
+void test_clobber_conflict(void) {
+  register long x10 asm("x10");
+  asm volatile("nop" :: "r"(x10) : "x10"); // expected-error {{conflicts with 
asm clobber list}}
+  asm volatile("nop" :: "r"(x10) : "a0"); // expected-error {{conflicts with 
asm clobber list}}
+  asm volatile("nop" : "=r"(x10) :: "x10"); // expected-error {{conflicts with 
asm clobber list}}
+  asm volatile("nop" : "=r"(x10) :: "a0"); // expected-error {{conflicts with 
asm clobber list}}
+}
Index: clang/lib/Basic/Targets/RISCV.h
===================================================================
--- clang/lib/Basic/Targets/RISCV.h
+++ clang/lib/Basic/Targets/RISCV.h
@@ -82,6 +82,11 @@
 
   const char *getClobbers() const override { return ""; }
 
+  StringRef getConstraintRegister(StringRef Constraint,
+                                  StringRef Expression) const override {
+    return Expression;
+  }
+
   ArrayRef<const char *> getGCCRegNames() const override;
 
   int getEHDataRegisterNumber(unsigned RegNo) const override {


Index: clang/test/Sema/inline-asm-validate-riscv.c
===================================================================
--- clang/test/Sema/inline-asm-validate-riscv.c
+++ clang/test/Sema/inline-asm-validate-riscv.c
@@ -21,3 +21,11 @@
   asm volatile ("" :: "K"(BelowMin)); // expected-error{{value '-1' out of range for constraint 'K'}}
   asm volatile ("" :: "K"(AboveMax)); // expected-error{{value '32' out of range for constraint 'K'}}
 }
+
+void test_clobber_conflict(void) {
+  register long x10 asm("x10");
+  asm volatile("nop" :: "r"(x10) : "x10"); // expected-error {{conflicts with asm clobber list}}
+  asm volatile("nop" :: "r"(x10) : "a0"); // expected-error {{conflicts with asm clobber list}}
+  asm volatile("nop" : "=r"(x10) :: "x10"); // expected-error {{conflicts with asm clobber list}}
+  asm volatile("nop" : "=r"(x10) :: "a0"); // expected-error {{conflicts with asm clobber list}}
+}
Index: clang/lib/Basic/Targets/RISCV.h
===================================================================
--- clang/lib/Basic/Targets/RISCV.h
+++ clang/lib/Basic/Targets/RISCV.h
@@ -82,6 +82,11 @@
 
   const char *getClobbers() const override { return ""; }
 
+  StringRef getConstraintRegister(StringRef Constraint,
+                                  StringRef Expression) const override {
+    return Expression;
+  }
+
   ArrayRef<const char *> getGCCRegNames() const override;
 
   int getEHDataRegisterNumber(unsigned RegNo) const override {
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