[PATCH] D109739: [X86][InlineAsm][Bugfix] Use mem size information (*word ptr) for "global variable + registers" memory expression in inline asm.

[Xiang Zhang via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG1f1c71aeacc1: [X86][InlineAsm] Use mem size information 
(*word ptr) for "global variable +… (authored by xiangzhangllvm).
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109739/new/

https://reviews.llvm.org/D109739

Files:
  clang/test/CodeGen/X86/ms_fmul.c
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp


Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -1759,7 +1759,7 @@
   // registers in a mmory expression, and though unaccessible via rip/eip.
   if (IsGlobalLV && (BaseReg || IndexReg)) {
     Operands.push_back(
-        X86Operand::CreateMem(getPointerWidth(), Disp, Start, End));
+        X86Operand::CreateMem(getPointerWidth(), Disp, Start, End, Size));
     return false;
   }
   // Otherwise, we set the base register to a non-zero value
Index: clang/test/CodeGen/X86/ms_fmul.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/X86/ms_fmul.c
@@ -0,0 +1,21 @@
+// REQUIRES: x86-registered-target
+
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -fasm-blocks -emit-llvm %s 
-o - | FileCheck %s
+// RUN: %clang_cc1 -triple i386-unknown-unknown -fasm-blocks -emit-llvm %s -o 
- | FileCheck %s
+
+// This test is designed to check if we use the mem size info for parsing MS
+// InlineAsm which use a global variable and one/two registers in a memory
+// expression. If we not use this mem size info, there will be error of
+// ambiguous operand size for some instructions. (e.g. 'fmul')
+__attribute__((aligned (16)))
+static const unsigned int static_const_table[] = { 0x00800000, };
+
+
+void __attribute__ ((naked)) foo(void)
+{__asm{
+    fmul qword ptr [static_const_table + 0x00f0 +edx]
+    ret
+}}
+
+// CHECK-LABEL: foo
+// CHECK: call void asm sideeffect inteldialect "fmul qword ptr 
static_const_table[edx + $$240]\0A\09ret"



Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -1759,7 +1759,7 @@
   // registers in a mmory expression, and though unaccessible via rip/eip.
   if (IsGlobalLV && (BaseReg || IndexReg)) {
     Operands.push_back(
-        X86Operand::CreateMem(getPointerWidth(), Disp, Start, End));
+        X86Operand::CreateMem(getPointerWidth(), Disp, Start, End, Size));
     return false;
   }
   // Otherwise, we set the base register to a non-zero value
Index: clang/test/CodeGen/X86/ms_fmul.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/X86/ms_fmul.c
@@ -0,0 +1,21 @@
+// REQUIRES: x86-registered-target
+
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -fasm-blocks -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple i386-unknown-unknown -fasm-blocks -emit-llvm %s -o - | FileCheck %s
+
+// This test is designed to check if we use the mem size info for parsing MS
+// InlineAsm which use a global variable and one/two registers in a memory
+// expression. If we not use this mem size info, there will be error of
+// ambiguous operand size for some instructions. (e.g. 'fmul')
+__attribute__((aligned (16)))
+static const unsigned int static_const_table[] = { 0x00800000, };
+
+
+void __attribute__ ((naked)) foo(void)
+{__asm{
+    fmul qword ptr [static_const_table + 0x00f0 +edx]
+    ret
+}}
+
+// CHECK-LABEL: foo
+// CHECK: call void asm sideeffect inteldialect "fmul qword ptr static_const_table[edx + $$240]\0A\09ret"

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