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In ARM mode, passing -mtp=cp15 forces the use of an inline MRC system register
read to move the thread pointer value into a register.
Currently, in Thumb2 mode, -mtp=cp15 is ignored, and a call to the
__aeabi_read_tp helper is emitted instead.
This is inconsistent, and breaks the Linux/ARM build for Thumb2 targets, as the
Linux kernel does not provide an implementation of __aeabi_read_tp,.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D112600
Files:
clang/test/CodeGen/arm-tphard.c
llvm/lib/Target/ARM/ARMInstrThumb.td
llvm/lib/Target/ARM/ARMInstrThumb2.td
Index: llvm/lib/Target/ARM/ARMInstrThumb2.td
===================================================================
--- llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -4670,7 +4670,9 @@
let DecoderNamespace = "Thumb2CoProc";
}
-
+// Reading thread pointer from coprocessor register
+def : T2Pat<(ARMthread_pointer), (t2MRC 15, 0, 13, 0, 3)>,
+ Requires<[IsThumb2, IsReadTPHard]>;
//===----------------------------------------------------------------------===//
// ARMv8.1 Privilege Access Never extension
Index: llvm/lib/Target/ARM/ARMInstrThumb.td
===================================================================
--- llvm/lib/Target/ARM/ARMInstrThumb.td
+++ llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -1520,6 +1520,7 @@
let isCall = 1, Defs = [R0, R12, LR, CPSR], Uses = [SP] in
def tTPsoft : tPseudoInst<(outs), (ins), 4, IIC_Br,
[(set R0, ARMthread_pointer)]>,
+ Requires<[IsThumb, IsReadTPSoft]>,
Sched<[WriteBr]>;
//===----------------------------------------------------------------------===//
Index: clang/test/CodeGen/arm-tphard.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/arm-tphard.c
@@ -0,0 +1,10 @@
+// REQUIRES: arm-registered-target
+
+// RUN: %clang -target armv7-linux-gnueabihf -mtp=cp15 -S -o - %s | FileCheck
%s
+// RUN: %clang -target armv7-linux-gnueabihf -mtp=cp15 -mthumb -S -o - %s |
FileCheck %s
+
+void *tphard(void) {
+// CHECK-NOT: __aeabi_read_tp
+ return __builtin_thread_pointer();
+}
+
Index: llvm/lib/Target/ARM/ARMInstrThumb2.td
===================================================================
--- llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -4670,7 +4670,9 @@
let DecoderNamespace = "Thumb2CoProc";
}
-
+// Reading thread pointer from coprocessor register
+def : T2Pat<(ARMthread_pointer), (t2MRC 15, 0, 13, 0, 3)>,
+ Requires<[IsThumb2, IsReadTPHard]>;
//===----------------------------------------------------------------------===//
// ARMv8.1 Privilege Access Never extension
Index: llvm/lib/Target/ARM/ARMInstrThumb.td
===================================================================
--- llvm/lib/Target/ARM/ARMInstrThumb.td
+++ llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -1520,6 +1520,7 @@
let isCall = 1, Defs = [R0, R12, LR, CPSR], Uses = [SP] in
def tTPsoft : tPseudoInst<(outs), (ins), 4, IIC_Br,
[(set R0, ARMthread_pointer)]>,
+ Requires<[IsThumb, IsReadTPSoft]>,
Sched<[WriteBr]>;
//===----------------------------------------------------------------------===//
Index: clang/test/CodeGen/arm-tphard.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/arm-tphard.c
@@ -0,0 +1,10 @@
+// REQUIRES: arm-registered-target
+
+// RUN: %clang -target armv7-linux-gnueabihf -mtp=cp15 -S -o - %s | FileCheck %s
+// RUN: %clang -target armv7-linux-gnueabihf -mtp=cp15 -mthumb -S -o - %s | FileCheck %s
+
+void *tphard(void) {
+// CHECK-NOT: __aeabi_read_tp
+ return __builtin_thread_pointer();
+}
+
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